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11.
公开(公告)号:US20130264650A1
公开(公告)日:2013-10-10
申请号:US13910352
申请日:2013-06-05
Applicant: Renesas Electronics Corporation
Inventor: Tomohiro TAMAKI , Yoshito NAKAZAWA , Satoshi EGUCHI
IPC: H01L27/088
CPC classification number: H01L29/7811 , H01L27/088 , H01L29/0615 , H01L29/0619 , H01L29/063 , H01L29/0634 , H01L29/0638 , H01L29/0696 , H01L29/1095 , H01L29/402 , H01L29/41741 , H01L29/41766 , H01L29/6634 , H01L29/66727 , H01L29/7395 , H01L29/7396
Abstract: A semiconductor device which solves the following problem of a super junction structure: due to a relatively high concentration in the body cell region (active region), in peripheral areas (peripheral regions or junction end regions), it is difficult to achieve a breakdown voltage equivalent to or higher than in the cell region through a conventional junction edge terminal structure or resurf structure. The semiconductor device includes a power MOSFET having a super junction structure formed in the cell region by a trench fill technique. Also, super junction structures having orientations parallel to the sides of the cell region are provided in a drift region around the cell region.
Abstract translation: 解决超结结构的以下问题的半导体装置:由于体细胞区域(有源区域)的相对高的浓度,在周边区域(周边区域或结合区域)中难以实现击穿电压 等于或高于通过常规的连接边缘端子结构或再结构的单元区域。 半导体器件包括通过沟槽填充技术在单元区域中形成的具有超结结构的功率MOSFET。 此外,在细胞区域周围的漂移区域中设置具有与细胞区域的侧面平行的取向的超结结构。
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公开(公告)号:US20150097237A1
公开(公告)日:2015-04-09
申请号:US14569730
申请日:2014-12-14
Applicant: Renesas Electronics Corporation
Inventor: Tomohiro TAMAKI , Yoshito NAKAZAWA
CPC classification number: H01L29/0634 , H01L29/0615 , H01L29/063 , H01L29/0638 , H01L29/0696 , H01L29/0878 , H01L29/1095 , H01L29/402 , H01L29/41766 , H01L29/66681 , H01L29/66727 , H01L29/7802 , H01L29/7811 , H01L29/7813 , H01L29/7823 , H01L29/7825
Abstract: A problem associated with n-channel power MOSFETs and the like that the following is caused even by relatively slight fluctuation in various process parameters is solved: source-drain breakdown voltage is reduced by breakdown at an end of a p-type body region in proximity to a portion in the vicinity of an annular intermediate region between an active cell region and a chip peripheral portion, arising from electric field concentration in that area. To solve this problem, the following measure is taken in a power semiconductor device having a superjunction structure in the respective drift regions of a first conductivity type of an active cell region, a chip peripheral region, and an intermediate region located therebetween: the width of at least one of column regions of a second conductivity type comprising the superjunction structure in the intermediate region is made larger than the width of the other regions.
Abstract translation: 解决了与各种工艺参数相对较轻的波动引起的n沟道功率MOSFET等相关的问题:源极 - 漏极击穿电压通过靠近p型体区域的端部的击穿而减小 到由该区域的电场浓度引起的活性单元区域与芯片周边部分之间的环状中间区域附近的部分。 为了解决这个问题,在第一导电类型的有源电池区域,芯片外围区域和位于它们之间的中间区域的各个漂移区域中,具有超结构结构的功率半导体器件采取以下措施: 使包括中间区域中的超结构结构的第二导电类型的列区域中的至少一个比其它区域的宽度大。
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公开(公告)号:US20140312418A1
公开(公告)日:2014-10-23
申请号:US14317744
申请日:2014-06-27
Applicant: Renesas Electronics Corporation
Inventor: Tomohiro TAMAKI , Yoshito NAKAZAWA
CPC classification number: H01L29/7811 , H01L23/3107 , H01L23/49562 , H01L24/05 , H01L24/06 , H01L24/45 , H01L24/48 , H01L24/49 , H01L29/0615 , H01L29/0619 , H01L29/0634 , H01L29/0638 , H01L29/0696 , H01L29/0878 , H01L29/1095 , H01L29/402 , H01L29/404 , H01L29/41766 , H01L29/66727 , H01L29/7816 , H01L2224/02166 , H01L2224/04042 , H01L2224/05624 , H01L2224/0603 , H01L2224/32245 , H01L2224/45139 , H01L2224/48247 , H01L2224/48472 , H01L2224/4903 , H01L2224/49111 , H01L2924/00014 , H01L2924/01013 , H01L2924/01014 , H01L2924/01019 , H01L2924/01028 , H01L2924/01079 , H01L2924/10253 , H01L2924/12036 , H01L2924/1305 , H01L2924/13055 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/15788 , H01L2924/181 , H01L2924/18301 , H01L2924/3025 , H01L2924/00012 , H01L2924/00 , H01L2224/45015 , H01L2924/207 , H01L2224/29099
Abstract: In a semiconductor power device such as a power MOSFET having a super-junction structure in each of an active cell region and a chip peripheral region, an outer end of a surface region of a second conductivity type coupled to a main junction of the second conductivity type in a surface of a drift region of a first conductivity type and having a concentration lower than that of the main junction is located in a middle region between an outer end of the main junction and an outer end of the super-junction structure in the chip peripheral region.
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公开(公告)号:US20140027847A1
公开(公告)日:2014-01-30
申请号:US14040483
申请日:2013-09-27
Applicant: Renesas Electronics Corporation
Inventor: Tomohiro TAMAKI , Yoshito NAKAZAWA
IPC: H01L29/78
CPC classification number: H01L29/7811 , H01L23/3107 , H01L23/49562 , H01L24/05 , H01L24/06 , H01L24/45 , H01L24/48 , H01L24/49 , H01L29/0615 , H01L29/0619 , H01L29/0634 , H01L29/0638 , H01L29/0696 , H01L29/0878 , H01L29/1095 , H01L29/402 , H01L29/404 , H01L29/41766 , H01L29/66727 , H01L29/7816 , H01L2224/02166 , H01L2224/04042 , H01L2224/05624 , H01L2224/0603 , H01L2224/32245 , H01L2224/45139 , H01L2224/48247 , H01L2224/48472 , H01L2224/4903 , H01L2224/49111 , H01L2924/00014 , H01L2924/01013 , H01L2924/01014 , H01L2924/01019 , H01L2924/01028 , H01L2924/01079 , H01L2924/10253 , H01L2924/12036 , H01L2924/1305 , H01L2924/13055 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/15788 , H01L2924/181 , H01L2924/18301 , H01L2924/3025 , H01L2924/00012 , H01L2924/00 , H01L2224/45015 , H01L2924/207 , H01L2224/29099
Abstract: In a semiconductor power device such as a power MOSFET having a super-junction structure in each of an active cell region and a chip peripheral region, an outer end of a surface region of a second conductivity type coupled to a main junction of the second conductivity type in a surface of a drift region of a first conductivity type and having a concentration lower than that of the main junction is located in a middle region between an outer end of the main junction and an outer end of the super-junction structure in the chip peripheral region.
Abstract translation: 在诸如在有源单元区域和芯片外围区域中的每一个中具有超结结构的功率MOSFET的半导体功率器件中,第二导电类型的表面区域的外端与第二导电性的主结 类型在第一导电类型的漂移区的表面中并且具有低于主结的浓度的漂移区的表面位于主结的外端和超结结构的外端之间的中间区域 芯片外围区域。
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公开(公告)号:US20130134500A1
公开(公告)日:2013-05-30
申请号:US13731065
申请日:2012-12-30
Applicant: Renesas Electronics Corporation
Inventor: Tomohiro TAMAKI , Yoshito NAKAZAWA
IPC: H01L29/78
CPC classification number: H01L29/0634 , H01L29/0615 , H01L29/063 , H01L29/0638 , H01L29/0696 , H01L29/0878 , H01L29/1095 , H01L29/402 , H01L29/41766 , H01L29/66681 , H01L29/66727 , H01L29/7802 , H01L29/7811 , H01L29/7813 , H01L29/7823 , H01L29/7825
Abstract: A problem associated with n-channel power MOSFETs and the like that the following is caused even by relatively slight fluctuation in various process parameters is solved: source-drain breakdown voltage is reduced by breakdown at an end of a p-type body region in proximity to a portion in the vicinity of an annular intermediate region between an active cell region and a chip peripheral portion, arising from electric field concentration in that area. To solve this problem, the following measure is taken in a power semiconductor device having a superjunction structure in the respective drift regions of a first conductivity type of an active cell region, a chip peripheral region, and an intermediate region located therebetween: the width of at least one of column regions of a second conductivity type comprising the superjunction structure in the intermediate region is made larger than the width of the other regions.
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