公开(公告)号：US20200185347A1

公开(公告)日：2020-06-11

申请号：US16790372

申请日：2020-02-13

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： KIYOHIRO HINE ,  HIDETOSHI KITAURA ,  AKIO FURUSAWA

IPC: H01L23/00 ,  C22C5/06 ,  B22F1/00

Abstract: A mounting structure is used, which includes: a semiconductor element including an element electrode; a metal member; and a sintered body configured to bond the semiconductor element and the metal member is used, in which the sintered body contains a first metal and a second metal solid-dissolved in the first metal, the second metal is a metal having a diffusion coefficient in the first metal larger than a self-diffusion coefficient of the first metal, and a content ratio of the second metal relative to a total mass of the first metal and the second metal in the sintered body is equal to or lower than a solid solution limit of the second metal to the first metal.

公开(公告)号：US20180331013A1

公开(公告)日：2018-11-15

申请号：US15950039

申请日：2018-04-10

Applicant: Panasonic Intellectual Property Management Co, Ltd

Inventor： KIYOHIRO HINE ,  AKIO FURUSAWA ,  HIDETOSHI KITAURA ,  KAZUKI SAKAI

IPC: H01L23/373 ,  H01L23/498 ,  H01L23/15 ,  H01L23/14 ,  H01L33/62 ,  H01L33/64 ,  H01L21/48 ,  B23K35/30 ,  B32B9/00 ,  B32B15/20 ,  C22C5/02

CPC classification number: H01L23/3735 ,  B23K35/3013 ,  B23K2101/36 ,  B23K2103/12 ,  B23K2103/52 ,  B32B9/005 ,  B32B15/20 ,  B32B2457/00 ,  C22C5/02 ,  H01L21/4857 ,  H01L21/4882 ,  H01L23/142 ,  H01L23/15 ,  H01L23/49811 ,  H01L23/49822 ,  H01L23/49866 ,  H01L33/62 ,  H01L33/641 ,  H01L33/647

Abstract: A mount structure having a joining capable of withstanding development of cracks generated by thermal stress due to repeated temperature changes in a mount structure having the joining of a large area is formed by joining a ceramic substrate electrode of a ceramic substrate and a metal substrate electrode of a metal substrate by a laminate, in which the laminate is formed by stacking a first interface layer, a first solder joining portion, a second interface layer, a first buffer material electrode, a buffer material, a second buffer material electrode, a third interface layer, a second solder joining portion and a fourth interface layer in this order from the ceramic substrate electrode toward the metal substrate electrode, a thickness of the laminate is 30 μm or more and 100 μm or less, a difference between a thickness of the first solder joining portion and a thickness of the second solder joining portion is within 25%, and differences in elastic moduli and in linear expansion coefficients between the first solder joining portion and the buffer material are respectively within 62%.

公开(公告)号：US20180257179A1

公开(公告)日：2018-09-13

申请号：US15897622

申请日：2018-02-15

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： HIDETOSHI KITAURA ,  AKIO FURUSAWA ,  KIYOHIRO HINE ,  KAZUKI SAKAI

IPC: B23K35/26 ,  C22C13/02

CPC classification number: B23K35/262 ,  B23K35/0227 ,  B23K2101/40 ,  C22C13/02 ,  H01L24/05 ,  H01L24/29 ,  H01L24/32 ,  H01L24/83 ,  H01L2224/04026 ,  H01L2224/05 ,  H01L2224/05073 ,  H01L2224/05124 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/29111 ,  H01L2224/32225 ,  H01L2224/32501 ,  H01L2224/83101 ,  H01L2224/83447 ,  H01L2224/83455 ,  H01L2224/83948 ,  H01L2924/10253 ,  H01L2924/01052 ,  H01L2924/01051 ,  H01L2924/01079

Abstract: Provided is a solder alloy including an Sb content of 3 wt % or more and 15 wt % or less, a Te content of 0.01 wt % or more and 1.5 wt % or less, an Au content of 0.005 wt % or more and 1 wt % or less, and a remainder that is Sn.

公开(公告)号：US20170129057A1

公开(公告)日：2017-05-11

申请号：US15267083

申请日：2016-09-15

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： KIYOHIRO HINE ,  AKIO FURUSAWA ,  HIDETOSHI KITAURA

IPC: B23K35/26 ,  H05K3/34 ,  C22C13/00 ,  H05K1/18

CPC classification number: B23K35/262 ,  C22C13/00 ,  H05K1/181 ,  H05K3/3457 ,  H05K3/3463 ,  H05K2201/10022 ,  H05K2201/10636 ,  Y02P70/611

Abstract: A solder alloy is substantially Ag-free and has desirable neat-resistance fatigue characteristics in a high-temperature environment as high as 150° C., even when used for soldering of electronic components having no leads. The solder alloy contains Sb, In, Cu, and Bi, and Sn accounting for the remainder, and satisfies the following formulae: 0.5≦[Sb]≦1.25 0.66[Sb]+4.16≦[In]≦6.0 0.5≦[Cu]≦1.2 0.1≦[Bi]≦0.5, wherein [Sb], [In], [Cu], and [Bi] represent the contents of Sb, In, Cu, and Bi, respectively, in mass %.