AUTOMATIC DOLLY ZOOM IMAGE PROCESSING DEVICE

    公开(公告)号:US20220358619A1

    公开(公告)日:2022-11-10

    申请号:US17722771

    申请日:2022-04-18

    Applicant: MediaTek Inc.

    Abstract: A system produces a dolly zoom effect by utilizing side view information. The system first captures a main image at a main location. The main image includes at least a foreground object of a given size and a background. The system calculates one or more side view locations based on a zoom-in factor to be applied to the background and an estimated size of the foreground object. The system then guides a user to capture one or more side view images at the one or more side view locations. The foreground object of the given size is superimposed onto a zoomed-in background. Then the side view information is used by the system to perform image inpainting.

    MACHINE LEARNING ASSISTED FRAMEWORK FOR ON-OR-OFF CHIP POWER MODEL ESTABLISHMENT

    公开(公告)号:US20250028887A1

    公开(公告)日:2025-01-23

    申请号:US18768459

    申请日:2024-07-10

    Applicant: MEDIATEK INC.

    Abstract: A computing device collects a plurality of data samples. Each data sample represents a signal activity of a plurality of signals of the chip. The computing device selects a subset of signals from the plurality of signals as proxies. These proxies are correlated with an actual power consumption of the chip according to a criterion. The computing device trains the power model using signal activities of the plurality of signals as inputs and the actual power consumption as an output. The computing device fine-tunes coefficients of the proxies in the power model. This fine-tuning adjusts an estimation error between an estimated power consumption output by the power model and the actual power consumption.

    AI frame engine for mobile edge
    16.
    发明授权

    公开(公告)号:US11580621B2

    公开(公告)日:2023-02-14

    申请号:US17113397

    申请日:2020-12-07

    Applicant: MEDIATEK INC.

    Abstract: Aspects of the disclosure provide a device for processing frames with aliasing artifacts. For example, the device can include a motion estimation circuit, a warping circuit coupled to the motion estimation circuit, and a temporal decision circuit coupled to the warping circuit. The motion estimation circuit can estimate a motion value between a current frame and a previous frame. The warping circuit can warp the previous frame based on the motion value such that the warped previous frame is aligned with the current frame and determine whether the current frame and the warped previous frame are consistent. The temporal decision circuit can generate an output frame, the output frame including either the current frame and the warped previous frame when the current frame and the warped previous frame are consistent, or the current frame when the current frame and the warped previous frame are not consistent.

    Hybrid non-uniform convolution transform engine for deep learning applications

    公开(公告)号:US10755169B2

    公开(公告)日:2020-08-25

    申请号:US15841733

    申请日:2017-12-14

    Applicant: MediaTek Inc.

    Abstract: A system performs convolution operations based on an analysis of the input size. The input includes data elements and filter weights. The system includes multiple processing elements. Each processing element includes multipliers and adders, with more of the adders than the multipliers. According to at least the analysis result which indicates whether the input size matches a predetermined size, the system is operative to select a first mode or a second mode. In the first mode, a greater number of the adders than the multipliers are enabled for each processing element to multiply transformed input and to perform an inverse transformation. In the second mode, an equal number of the adders and the multipliers are enabled for each processing element to multiply-and-accumulate the input. One or more of the multipliers are shared by the first mode and the second mode.

    HYBRID NON-UNIFORM CONVOLUTION TRANSFORM ENGINE FOR DEEP LEARNING APPLICATIONS

    公开(公告)号:US20190114536A1

    公开(公告)日:2019-04-18

    申请号:US15841733

    申请日:2017-12-14

    Applicant: MediaTek Inc.

    Abstract: A system performs convolution operations based on an analysis of the input size. The input includes data elements and filter weights. The system includes multiple processing elements. Each processing element includes multipliers and adders, with more of the adders than the multipliers. According to at least the analysis result which indicates whether the input size matches a predetermined size, the system is operative to select a first mode or a second mode. In the first mode, a greater number of the adders than the multipliers are enabled for each processing element to multiply transformed input and to perform an inverse transformation. In the second mode, an equal number of the adders and the multipliers are enabled for each processing element to multiply-and-accumulate the input. One or more of the multipliers are shared by the first mode and the second mode.

Patent Agency Ranking