METHODS AND APPARATUS TO CALIBRATE SPATIAL LIGHT MODULATORS

    公开(公告)号:US20210325828A1

    公开(公告)日:2021-10-21

    申请号:US17359151

    申请日:2021-06-25

    Abstract: Methods and apparatus to calibrate spatial light modulators are disclosed. Examples include processor circuitry to execute and/or instantiate instructions to provide a greyscale image to a spatial light modulator (SLM) to define voltages to be applied to individual pixels of the SLM. The voltages associated with pixel values in the greyscale image. The pixel values arranged in a double-slit grating pattern. The SLM to produce an interference pattern based on the double-slit grating pattern. The processor circuitry is to determine a phase difference between first and second gratings of the double-slit grating pattern based on the interference pattern. The processor circuitry is to generate a phase curvature based on the phase difference.

    Apparatus and method for a hierarchical beam tracer

    公开(公告)号:US11315304B2

    公开(公告)日:2022-04-26

    申请号:US17003011

    申请日:2020-08-26

    Abstract: Apparatus and method for a hierarchical beam tracer. For example, one embodiment of an apparatus comprises: a beam generator to generate beam data associated with a beam projected into a graphics scene; a bounding volume hierarchy (BVH) generator to generate BVH data comprising a plurality of hierarchically arranged BVH nodes; a hierarchical beam-based traversal unit to determine whether the beam intersects a current BVH node and, if so, to responsively subdivide the beam into N child beams to test against the current BVH node and/or to traverse further down the BVH hierarchy to select a new BVH node, wherein the hierarchical beam-based traversal unit is to iteratively subdivide successive intersecting child beams and/or to continue to traverse down the BVH hierarchy until a leaf node is reached with which at least one final child beam is determined to intersect; the hierarchical beam-based traversal unit to generate a plurality of rays within the final child beam; and intersection hardware logic to perform intersection testing for any rays intersecting the leaf node, the intersection testing to determine intersections between the rays intersecting the leaf node and primitives bounded by the leaf node.

    Cell primitive for unstructured volume rendering

    公开(公告)号:US10937225B2

    公开(公告)日:2021-03-02

    申请号:US16236271

    申请日:2018-12-28

    Abstract: Apparatus and method including cell primitive for unstructured volume rendering. For example, one embodiment of an apparatus comprises: a ray generator to generate a plurality of rays in a first graphics scene; a hierarchical acceleration data structure generator to construct a hierarchical acceleration data structure comprising a plurality of hierarchically arranged nodes including leaf nodes and inner nodes; traversal circuitry to traverse one or more of the rays through the hierarchical acceleration data structure; unstructured volume intersection circuitry to intersect a ray with an unstructured volume primitive within a leaf node of the hierarchical acceleration data structure, the unstructured volume intersection circuitry to determine multiple intersection hits between a ray and an unstructured volume primitive.

    Methods and apparatus to calibrate spatial light modulators

    公开(公告)号:US12298719B2

    公开(公告)日:2025-05-13

    申请号:US17359151

    申请日:2021-06-25

    Abstract: Methods and apparatus to calibrate spatial light modulators are disclosed. Examples include processor circuitry to execute and/or instantiate instructions to provide a greyscale image to a spatial light modulator (SLM) to define voltages to be applied to individual pixels of the SLM. The voltages associated with pixel values in the greyscale image. The pixel values arranged in a double-slit grating pattern. The SLM to produce an interference pattern based on the double-slit grating pattern. The processor circuitry is to determine a phase difference between first and second gratings of the double-slit grating pattern based on the interference pattern. The processor circuitry is to generate a phase curvature based on the phase difference.

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