公开(公告)号：US10957095B2

公开(公告)日：2021-03-23

申请号：US16056222

申请日：2018-08-06

申请人： Intel Corporation

发明人： Karthik Vaidyanathan ,  Won-Jong Lee ,  Gabor Liktor ,  John G. Gierach ,  Pawel Majewski ,  Prasoonkumar Surti ,  Carsten Benthin ,  Sven Woop ,  Thomas Raoux

IPC分类号： G06T15/00 ,  G06T15/06 ,  G06T15/80 ,  G06T1/60 ,  G09G5/36

摘要： Apparatus and method for programmable ray tracing with hardware acceleration on a graphics processor. For example, one embodiment of a graphics processor comprises shader execution circuitry to execute a plurality of programmable ray tracing shaders. The shader execution circuitry includes a plurality of single instruction multiple data (SIMD) execution units. Sorting circuitry regroups data associated with one or more of the programmable ray tracing shaders to increase occupancy for SIMD operations performed by the SIMD execution units; and fixed-function intersection circuitry coupled to the shader execution circuitry detects intersections between rays and bounding volume hierarchies (BVHs) and/or objects contained therein and to provide results indicating the intersections to the sorting circuitry.

公开(公告)号：US10937225B2

公开(公告)日：2021-03-02

申请号：US16236271

申请日：2018-12-28

申请人： Intel Corporation

发明人： Timothy Rowley ,  Won-Jong Lee ,  Karol Szerszen ,  Hiroshi Akiba ,  Alexey Supikov

IPC分类号： G06T15/06 ,  G06T15/08 ,  G06T17/30 ,  G06T17/10

摘要： Apparatus and method including cell primitive for unstructured volume rendering. For example, one embodiment of an apparatus comprises: a ray generator to generate a plurality of rays in a first graphics scene; a hierarchical acceleration data structure generator to construct a hierarchical acceleration data structure comprising a plurality of hierarchically arranged nodes including leaf nodes and inner nodes; traversal circuitry to traverse one or more of the rays through the hierarchical acceleration data structure; unstructured volume intersection circuitry to intersect a ray with an unstructured volume primitive within a leaf node of the hierarchical acceleration data structure, the unstructured volume intersection circuitry to determine multiple intersection hits between a ray and an unstructured volume primitive.