公开(公告)号：US20210098410A1

公开(公告)日：2021-04-01

申请号：US17060434

申请日：2020-10-01

Applicant: Infineon Technologies AG

Inventor： Ali Roshanghias ,  Alfred Binder ,  Barbara Eichinger ,  Stefan Karner ,  Martin Mischitz ,  Rainer Pelzer

IPC: H01L23/00 ,  H01L25/065 ,  H01L25/00

Abstract: A multi-chip device is provided. The multi-chip device includes a first chip, a second chip mounted on the first chip, and a hardened printed or sprayed electrically conductive material forming a sintered electrically conductive interface between the first chip and the second chip.

公开(公告)号：US09911686B2

公开(公告)日：2018-03-06

申请号：US15155271

申请日：2016-05-16

Applicant: Infineon Technologies AG

Inventor： Manfred Schneegans ,  Andreas Meiser ,  Martin Mischitz ,  Michael Roesner ,  Michael Pinczolits

IPC: H01L23/528 ,  H01L23/495 ,  H01L21/48 ,  H01L21/78 ,  H01L23/00

CPC classification number: H01L23/49562 ,  H01L21/4807 ,  H01L21/56 ,  H01L21/6835 ,  H01L21/6836 ,  H01L21/78 ,  H01L23/291 ,  H01L23/3121 ,  H01L23/49503 ,  H01L23/49582 ,  H01L23/49586 ,  H01L23/528 ,  H01L24/03 ,  H01L24/05 ,  H01L24/08 ,  H01L24/32 ,  H01L24/49 ,  H01L24/94 ,  H01L24/97 ,  H01L2221/68327 ,  H01L2221/68336 ,  H01L2221/6834 ,  H01L2221/68377 ,  H01L2224/03002 ,  H01L2224/0346 ,  H01L2224/03505 ,  H01L2224/03602 ,  H01L2224/0391 ,  H01L2224/04026 ,  H01L2224/04042 ,  H01L2224/05556 ,  H01L2224/05576 ,  H01L2224/05647 ,  H01L2224/05687 ,  H01L2224/0603 ,  H01L2224/08245 ,  H01L2224/32245 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/0532 ,  H01L2924/05341 ,  H01L2924/05432 ,  H01L2924/05442 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/20109 ,  H01L2924/2011 ,  H01L2924/20111 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/03

Abstract: A method for forming a semiconductor device includes forming device regions in a semiconductor substrate having a first side and a second side. The device regions are formed adjacent the first side. The method further includes forming a seed layer over the first side of the semiconductor substrate, and forming a patterned resist layer over the seed layer. A contact pad is formed over the seed layer within the patterned resist layer. The method further includes removing the patterned resist layer after forming the contact pad to expose a portion of the seed layer underlying the patterned resist layer, and forming a protective layer over the exposed portion of the seed layer.

公开(公告)号：US20170243794A1

公开(公告)日：2017-08-24

申请号：US15048614

申请日：2016-02-19

Applicant: Infineon Technologies AG

Inventor： Claudia Sgiarovello ,  Martin Mischitz ,  Andrew Wood

IPC: H01L21/66 ,  H01L21/67 ,  H01L23/522 ,  H01L23/525 ,  H01L21/768 ,  H01L23/528

CPC classification number: H01L22/20 ,  H01L21/76886 ,  H01L22/14 ,  H01L23/5252 ,  H01L23/5256

Abstract: A method of manufacturing a wafer. The method includes providing a wafer that includes a plurality of semiconductor device structures, and testing at least one of the plurality of semiconductor device structures. Based on a test result, a substance is provided on a selected portion of the wafer to selectively configure a circuit element within the at least one of the plurality of semiconductor device structures.

公开(公告)号：US20160225718A1

公开(公告)日：2016-08-04

申请号：US14608884

申请日：2015-01-29

Applicant: Infineon Technologies AG

Inventor： Martin Mischitz ,  Markus Heinrici ,  Stefan Schwab

IPC: H01L23/532 ,  H01L21/768

CPC classification number: H05K1/09 ,  H01L21/288 ,  H01L23/53228 ,  H05K1/11 ,  H05K3/22

Abstract: A device comprises a base element and a metallization layer over the base element. The metallization layer comprises pores and has a varying degree of porosity, the degree of porosity being higher in a portion adjacent to the base element than in a portion remote from the base element.

Abstract translation: 一种器件包括在基底元件上的基底元件和金属化层。 金属化层包含孔隙并具有不同程度的孔隙率，孔隙度在与基底元件相邻的部分中高于远离基底元件的部分。

公开(公告)号：US20160035560A1

公开(公告)日：2016-02-04

申请号：US14451043

申请日：2014-08-04

Applicant: Infineon Technologies AG

Inventor： Manfred Schneegans ,  Martin Mischitz ,  Michael Roesner ,  Michael Pinczolits

IPC: H01L21/02 ,  H01L21/683 ,  H01L21/78

CPC classification number: H01L21/6836 ,  H01L21/56 ,  H01L23/291 ,  H01L23/3121 ,  H01L23/49551 ,  H01L24/02 ,  H01L24/03 ,  H01L24/05 ,  H01L24/28 ,  H01L24/32 ,  H01L24/94 ,  H01L2221/68327 ,  H01L2224/03002 ,  H01L2224/0346 ,  H01L2224/03602 ,  H01L2224/0391 ,  H01L2224/04026 ,  H01L2224/04042 ,  H01L2224/05556 ,  H01L2224/05571 ,  H01L2224/05647 ,  H01L2224/0603 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2924/10158 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/03

Abstract: In accordance with an alternative embodiment of the present invention, a method for forming a semiconductor device includes applying a paste over a semiconductor substrate, and forming a ceramic carrier by solidifying the paste. The semiconductor substrate is thinned using the ceramic carrier as a carrier.

Abstract translation: 根据本发明的替代实施例，一种用于形成半导体器件的方法包括在半导体衬底上施加糊料，并通过固化糊料形成陶瓷载体。 使用陶瓷载体作为载体来减薄半导体衬底。

公开(公告)号：US10515910B2

公开(公告)日：2019-12-24

申请号：US14535456

申请日：2014-11-07

Applicant: INFINEON TECHNOLOGIES AG

Inventor： Martin Mischitz ,  Kurt Matoy

IPC: H01L23/482 ,  H01L23/00

Abstract: According to various embodiments, a semiconductor device may include: a contact pad; a metal clip disposed over the contact pad; and a porous metal layer disposed between the metal clip and the contact pad, the porous metal layer connecting the metal clip and the contact pad with each other.

公开(公告)号：US10340197B2

公开(公告)日：2019-07-02

申请号：US15617303

申请日：2017-06-08

Applicant: Infineon Technologies AG

Inventor： Claudia Sgiarovello ,  Martin Mischitz ,  Andrew Wood

IPC: H01L21/66 ,  H01L21/768 ,  H01L23/525

Abstract: A die includes a plurality of dielectric landings and a conductive material distributed across one or more of the plurality of dielectric landings. Each one of the plurality of dielectric landings electrically separates two conductive landings associated with the one of the plurality of dielectric landings. The conductive material establishes an electrical connection between the two conductive landings associated with the one or more of the plurality of dielectric landings.

公开(公告)号：US09899277B2

公开(公告)日：2018-02-20

申请号：US15048658

申请日：2016-02-19

Applicant: Infineon Technologies AG

Inventor： Claudia Sgiarovello ,  Martin Mischitz ,  Andrew Wood

IPC: G01R31/26 ,  H01L21/66 ,  H01L23/525 ,  H01L25/065

CPC classification number: H01L22/22 ,  H01L22/14 ,  H01L22/20 ,  H01L23/525 ,  H01L23/5252 ,  H01L23/5256 ,  H01L25/0657

Abstract: A method of manufacturing a wafer. The method includes providing a wafer and testing the wafer. Based on a test result, a substance is selectively provided on the wafer to obtain an altered wafer that has at least one selected portion altered. The method includes forming a structural layer over the altered wafer.

公开(公告)号：US20170242137A1

公开(公告)日：2017-08-24

申请号：US15436512

申请日：2017-02-17

Applicant: Infineon Technologies AG

Inventor： Claudia Sgiarovello ,  Martin Mischitz ,  Andrew Wood

IPC: G01T5/00 ,  H01L21/66 ,  G06K19/06 ,  H01L23/522 ,  H01L21/768 ,  G01R31/28 ,  H01L21/78 ,  H01L23/525

CPC classification number: G01T5/00 ,  G01R31/2831 ,  G06K19/06028 ,  G06K19/06037 ,  H01L21/76886 ,  H01L21/76892 ,  H01L21/78 ,  H01L22/14 ,  H01L22/20 ,  H01L23/5222 ,  H01L23/5227 ,  H01L23/5228 ,  H01L23/5252 ,  H01L23/5256

Abstract: A method for use in manufacturing a plurality of electronic devices from a workpiece. The method includes compiling a set of data records in a data file, wherein each data record represents information uniquely associated with a respective electronic device to be manufactured from the workpiece. Based on the data file, deposition of a substance is controlled at selected locations on the workpiece.

公开(公告)号：US20160133584A1

公开(公告)日：2016-05-12

申请号：US14535456

申请日：2014-11-07

Applicant: INFINEON TECHNOLOGIES AG

Inventor： Martin Mischitz ,  Kurt Matoy

IPC: H01L23/00

Abstract: According to various embodiments, a semiconductor device may include: a contact pad; a metal clip disposed over the contact pad; and a porous metal layer disposed between the metal clip and the contact pad, the porous metal layer connecting the metal clip and the contact pad with each other.

Abstract translation: 根据各种实施例，半导体器件可以包括：接触垫; 设置在所述接触垫上方的金属夹; 以及设置在所述金属夹和所述接触垫之间的多孔金属层，所述多孔金属层将所述金属夹和所述接触垫彼此连接。