公开(公告)号：US20090046216A1

公开(公告)日：2009-02-19

申请号：US12228709

申请日：2008-08-15

Applicant: Hung-Yu Chen

Inventor： Hung-Yu Chen

IPC: G02F1/133 ,  G02F1/1368

CPC classification number: G02F1/1368 ,  G02F1/13306

Abstract: An LCD includes data lines, gate lines intersecting with the data lines, and pixel units. Each pixel unit is defined by a minimal area formed by two adjacent data lines and two adjacent gate lines. Each pixel unit includes a first sub pixel unit and a second sub pixel unit. The first sub pixel unit includes a first thin film transistor (TFT) and a first pixel electrode. The second sub pixel unit includes a second TFT and a second pixel electrode. A gate electrode of the first TFT is connected to the gate line, a source electrode of the first TFT is connected to the data line. A source electrode of the second TFT is connected to a same data line, and a gate electrode of the second TFT is electrically floating.

Abstract translation: LCD包括数据线，与数据线相交的栅极线和像素单元。 每个像素单元由由两个相邻数据线和两个相邻栅极线形成的最小区域限定。 每个像素单元包括第一子像素单元和第二子像素单元。 第一子像素单元包括第一薄膜晶体管（TFT）和第一像素电极。 第二子像素单元包括第二TFT和第二像素电极。 第一TFT的栅电极连接到栅极线，第一TFT的源电极连接到数据线。 第二TFT的源电极连接到相同的数据线，第二TFT的栅电极是电浮置的。

公开(公告)号：US07420251B2

公开(公告)日：2008-09-02

申请号：US11540007

申请日：2006-09-29

Applicant: Chi-Ming Chen ,  Hung-Yu Chen

Inventor： Chi-Ming Chen ,  Hung-Yu Chen

IPC: H01L23/62

CPC classification number: H01L27/0285

Abstract: An exemplary ESD protection circuit includes first and second sets of transistors and an ESD discharge transistor. Each of the transistors includes a source electrode, a drain electrode, and a gate electrode. The drain electrodes and gate electrodes of each of the transistors are connected to each other, and the source electrodes of the transistors are respectively connected to the drain electrodes of the next adjacent transistors in both sets of the transistors. The gate electrode of the ESD transistor, the source electrodes of last transistors of the first and second sets of the transistors are connected to each other, the source electrode of the ESD transistor is connected to the drain electrode of a first transistor of the first set of the transistors, and the drain electrode of the ESD transistor is connected to the drain electrode of a first transistor of the second set of the transistors.

Abstract translation: 示例性的ESD保护电路包括第一和第二组晶体管和ESD放电晶体管。 每个晶体管包括源电极，漏电极和栅电极。 各个晶体管的漏电极和栅电极彼此连接，并且晶体管的源电极分别连接到两组晶体管中的下一相邻晶体管的漏电极。 ESD晶体管的栅电极，第一和第二组晶体管的最后一个晶体管的源极彼此连接，ESD晶体管的源电极连接到第一组的第一晶体管的漏电极 的晶体管，并且ESD晶体管的漏电极连接到第二组晶体管的第一晶体管的漏电极。

公开(公告)号：US20070155909A1

公开(公告)日：2007-07-05

申请号：US11600176

申请日：2006-11-16

Applicant: Kuo-Chen Shih ,  Hung-Yu Chen ,  Tsai-Tien Su

Inventor： Kuo-Chen Shih ,  Hung-Yu Chen ,  Tsai-Tien Su

IPC: C08F20/44

CPC classification number: B01J31/1805 ,  B01J31/1895 ,  B01J31/2208 ,  B01J31/2234 ,  B01J31/226 ,  B01J31/24 ,  B01J31/2404 ,  B01J2231/645 ,  B01J2531/821 ,  B01J2531/827

Abstract: A metal catalyst for hydrogenating unsaturated carbon-carbon bonds of copolymer is provided. The metal catalyst is a bimetallic complex comprising iridium and ruthenium. The metal catalyst has a formula comprising M1aM2bXm(L1)n, wherein the M1 is iridium, M2 is ruthenium; X is hydrogen, chlorine, bromine, iodine or pseudo halide; L1 is phosphine , bisphosphine, arsane or organic with nitrogen, sulfur and oxygen.

Abstract translation: 提供了用于氢化共聚物的不饱和碳 - 碳键的金属催化剂。 金属催化剂是包含铱和钌的双金属络合物。 金属催化剂具有包含M 1，M 2，M 2， （L 1）n N，其中M 1是铱，M 2是钌; X是氢，氯，溴，碘或假卤化物; 膦1，膦，双膦，阿烷或有机氮，硫和氧。

公开(公告)号：US20070046882A1

公开(公告)日：2007-03-01

申请号：US11511142

申请日：2006-08-28

Applicant: Hung-Yu Chen ,  Tsau-Hua Hsieh

Inventor： Hung-Yu Chen ,  Tsau-Hua Hsieh

IPC: G02F1/1343

CPC classification number: G02F1/134363 ,  G02F1/136286 ,  G02F2201/121 ,  G02F2201/122

Abstract: An exemplary in-plane switching mode liquid crystal display (IPS-LCD) panel (100) includes a thin film transistors (TFT) substrate (120), a color filter (CF) substrate (110) facing the TFT substrate, a liquid crystal layer (130) sandwiched between the two substrates. The TFT substrate includes a plurality of gate lines and source bus lines (121, 122) defining pixel regions. Each of the pixel regions includes a pair of source bus lines, a pixel electrode (125) therebetween and parallel to the source bus lines, a pair of shield metal lines (123) located at two opposite sides of the pixel electrode, a pair of common electrodes (126) that are parallel to the pixel electrode and partly overlap the shield metal lines respectively. Each of the common electrodes includes a slit (1261) therein in order to attenuate any crosstalk between the source bus line and the pixel electrode.

Abstract translation: 示例性的面内切换模式液晶显示器（IPS-LCD）面板（100）包括薄膜晶体管（TFT）基板（120），面向TFT基板的滤色器（CF）基板（110），液晶 层（130）夹在两个基板之间。 TFT基板包括限定像素区域的多个栅极线和源极总线（121,122）。 每个像素区域包括一对源极总线，在它们之间并与源极总线相平行的像素电极（125），位于像素电极的两个相对侧的一对屏蔽金属线（123），一对 公共电极（126），其平行于像素电极并部分地与屏蔽金属线重叠。 每个公共电极在其中包括狭缝（1261），以便衰减源极总线与像素电极之间的任何串扰。

公开(公告)号：US20070030432A1

公开(公告)日：2007-02-08

申请号：US11501610

申请日：2006-08-08

Applicant: Hung-Yu Chen ,  Tsau-Hua Hsieh

Inventor： Hung-Yu Chen ,  Tsau-Hua Hsieh

IPC: G02F1/1343

CPC classification number: G02F1/134363 ,  G02F1/136213

Abstract: An exemplary in plane switching liquid crystal display (IPS LCD) includes a first substrate (230) and a second substrate (240) opposite to each other, a liquid crystal layer sandwiched between the first and second substrates. A shielding metal line (212) is arranged on the first substrate. A first insulation layer (222) is arranged on the shielding metal line. A drain line (203) is arranged on the first insulation layer and overlapping the shielding metal. A second insulation layer (223) is arranged on the drain line. A common electrode (210) is arranged on the second insulation layer and overlapping the drain line. A pixel electrode (211) is arranged on the second insulation layer and being parallel to the common electrode. The IPS LCD can obtain a high aperture ratio.

Abstract translation: 平面切换液晶显示器（IPS LCD）中的示例性例子包括彼此相对的第一基板（230）和第二基板（240），夹在第一和第二基板之间的液晶层。 屏蔽金属线（212）布置在第一基板上。 第一绝缘层（222）布置在屏蔽金属线上。 漏极线（203）布置在第一绝缘层上并与屏蔽金属重叠。 在排水管上设置第二绝缘层223。 公共电极（210）布置在第二绝缘层上并且与漏极线重叠。 像素电极（211）布置在第二绝缘层上并且平行于公共电极。 IPS LCD可以获得高开口率。

公开(公告)号：US09346719B2

公开(公告)日：2016-05-24

申请号：US12842240

申请日：2010-07-23

Applicant: Kuo-Chen Shih ,  Hung-Yu Chen ,  Mao-Lin Hsueh ,  Yi-Zhen Chen

Inventor： Kuo-Chen Shih ,  Hung-Yu Chen ,  Mao-Lin Hsueh ,  Yi-Zhen Chen

IPC: C07C5/10 ,  B01J31/12 ,  C07C5/03 ,  B01J31/22

CPC classification number: C07C5/03 ,  B01J31/122 ,  B01J31/2295 ,  B01J2231/645 ,  B01J2531/46 ,  C07C2531/12 ,  C07C2531/38 ,  C07C2601/16 ,  C07C2602/08 ,  C07C2602/10 ,  C07C2603/18 ,  Y02P20/52

Abstract: A hydrogenation catalyst system is provided. The catalyst system includes a metal complex of Formula (I), an organic lithium compound and an organic compound having a cyclic structure including at least one double bond. In Formula (I), M is transition metals. R1, R2, R3, R4 and R5 are the same or different, including hydrogen, C1-8 alkyl, and C1-8 alkoxy, or two of R1, R2, R3, R4 and R5 are linked together to form a ring. X1, X2 and X3 are a cyclic group, hydrogen, chlorine, bromine, alkyl or alkoxy, wherein when one of X1, X2 and X3 is a cyclic group, and the others are the same or different, including hydrogen, chlorine, bromine, alkyl or alkoxy. The invention also provides a selective hydrogenation process utilizing the catalyst system.

Abstract translation: 提供了一种氢化催化剂体系。 催化剂体系包括式（I）的金属络合物，有机锂化合物和具有至少一个双键的环状结构的有机化合物。 在式（I）中，M是过渡金属。 R 1，R 2，R 3，R 4和R 5相同或不同，包括氢，C 1-8烷基和C 1-8烷氧基，或者R 1，R 2，R 3，R 4和R 5中的两个连接在一起形成环。 X 1，X 2和X 3是环状基团，氢，氯，溴，烷基或烷氧基，其中当X 1，X 2和X 3中的一个是环状基团时，其它相同或不同，包括氢，氯，溴， 烷基或烷氧基。 本发明还提供了利用催化剂体系的选择性氢化方法。

公开(公告)号：US07868954B2

公开(公告)日：2011-01-11

申请号：US12080407

申请日：2008-04-02

Applicant: Hung-Yu Chen ,  Tsau-Hua Hsieh ,  Chih-Hao Chen

Inventor： Hung-Yu Chen ,  Tsau-Hua Hsieh ,  Chih-Hao Chen

IPC: G02F1/1343

CPC classification number: G02F1/13394 ,  G02F1/136286 ,  G02F2001/134318 ,  G02F2201/121 ,  G02F2201/42 ,  G09G3/3655 ,  G09G2300/0426 ,  G09G2300/0439 ,  G09G2300/0452

Abstract: An exemplary liquid crystal panel (400) includes a first substrate (401) having a common electrode layer (429), a second substrate (402) parallel to the first substrate, and a liquid crystal layer (403) between the first and second substrates. The liquid crystal layer defines an active area (406) thereat. The second substrate includes common lines (440). Electrical coupling elements are disposed at the active area, so as to electrically couple the common electrode layer to the common lines.

Abstract translation: 示例性液晶面板（400）包括具有公共电极层（429）的第一衬底（401），与第一衬底平行的第二衬底（402）和在第一和第二衬底之间的液晶层（403） 。 液晶层在其上限定有效区域（406）。 第二基板包括公共线（440）。 电耦合元件设置在有源区，以便将公共电极层电耦合到公共线。

公开(公告)号：US07636143B2

公开(公告)日：2009-12-22

申请号：US11511142

申请日：2006-08-28

Applicant: Hung-Yu Chen ,  Tsau-Hua Hsieh

Inventor： Hung-Yu Chen ,  Tsau-Hua Hsieh

IPC: G02F1/1343

CPC classification number: G02F1/134363 ,  G02F1/136286 ,  G02F2201/121 ,  G02F2201/122

Abstract: An exemplary in-plane switching mode liquid crystal display (IPS-LCD) panel (100) includes a thin film transistors (TFT) substrate (120), a color filter (CF) substrate (110) facing the TFT substrate, a liquid crystal layer (130) sandwiched between the two substrates. The TFT substrate includes a plurality of gate lines and source bus lines (121, 122) defining pixel regions. Each of the pixel regions includes a pair of source bus lines, a pixel electrode (125) therebetween and parallel to the source bus lines, a pair of shield metal lines (123) located at two opposite sides of the pixel electrode, a pair of common electrodes (126) that are parallel to the pixel electrode and partly overlap the shield metal lines respectively. Each of the common electrodes includes a slit (1261) therein in order to attenuate any crosstalk between the source bus line and the pixel electrode.

Abstract translation: 示例性的面内切换模式液晶显示器（IPS-LCD）面板（100）包括薄膜晶体管（TFT）基板（120），面向TFT基板的滤色器（CF）基板（110），液晶 层（130）夹在两个基板之间。 TFT基板包括限定像素区域的多个栅极线和源极总线（121,122）。 每个像素区域包括一对源极总线，在它们之间并与源极总线相平行的像素电极（125），位于像素电极的两个相对侧的一对屏蔽金属线（123），一对 公共电极（126），其平行于像素电极并部分地与屏蔽金属线重叠。 每个公共电极在其中包括狭缝（1261），以便衰减源极总线与像素电极之间的任何串扰。

公开(公告)号：US07633575B2

公开(公告)日：2009-12-15

申请号：US12157066

申请日：2008-06-06

Applicant: Chien-Cheng Chen ,  Yu-Cheng Lin ,  Hung-Yu Chen

Inventor： Chien-Cheng Chen ,  Yu-Cheng Lin ,  Hung-Yu Chen

IPC: G02F1/136

CPC classification number: G02F1/1368 ,  G02F1/133707 ,  G02F1/1393 ,  H01L27/12

Abstract: An exemplary liquid crystal display (100) includes gate lines (122), and data lines (123) cooperatively defining pixel units. Each pixel unit includes a first thin film transistor (TFT) (125), a second TFT (126), a first pixel electrode (127), and a second pixel electrode (128). Gate electrodes of the two TFTs are connected to one of the gate lines. A source electrode of the first TFT is connected to one of the data lines. A drain electrode of the first TFT is connected to the first pixel electrode. A source electrode of the second TFT is connected to the first pixel electrode. A drain electrode of the second TFT is connected to the second pixel electrode. A channel width/length ratio of the second TFT is such that a voltage of the drain electrode thereof is less than a voltage of the source electrode thereof when the second TFT is switched on.

Abstract translation: 示例性液晶显示器（100）包括门线（122）和协作地限定像素单元的数据线（123）。 每个像素单元包括第一薄膜晶体管（TFT）（125），第二TFT（126），第一像素电极（127）和第二像素电极（128）。 两个TFT的栅电极连接到一条栅极线。 第一TFT的源极连接到数据线之一。 第一TFT的漏极连接到第一像素电极。 第二TFT的源极连接到第一像素电极。 第二TFT的漏电极连接到第二像素电极。 当第二TFT接通时，第二TFT的沟道宽度/长度比使得其漏电极的电压小于其源电极的电压。

公开(公告)号：US20090040413A1

公开(公告)日：2009-02-12

申请号：US12228397

申请日：2008-08-11

Applicant: Chien-Cheng Chen ,  Hung-Yu Chen ,  Yu-Cheng Lin ,  Wen-Ming Hung ,  Yung-Hsun Wu ,  Chueh-Ju Chen ,  Ying-Tsung Lin

Inventor： Chien-Cheng Chen ,  Hung-Yu Chen ,  Yu-Cheng Lin ,  Wen-Ming Hung ,  Yung-Hsun Wu ,  Chueh-Ju Chen ,  Ying-Tsung Lin

IPC: G02F1/1368 ,  H01L27/02

CPC classification number: H01L27/124 ,  G02F1/13624 ,  G09G3/3648 ,  G09G2300/0426 ,  G09G2300/0443 ,  G09G2300/0447 ,  H01L27/1214

Abstract: An exemplary thin film transistor (TFT) substrate assembly includes a substrate, a plurality of gate lines disposed on an inner surface of the substrate, a plurality of data lines disposed insulated with the gate lines. The plurality of gate lines and the plurality of data lines define a plurality of pixel regions. Each pixel region includes a first switch element, a second switch element, a first pixel electrode, and a second pixel electrode. The first switch element and the second switch element are connected with a same gate line from the plurality of gate lines. The first pixel electrode is applied with data signals from a data line from the plurality of data lines via the first switch element. The second pixel electrode is applied with data signals from the data line from the plurality of data lines via the second switch element and a voltage dividing element.

Abstract translation: 示例性薄膜晶体管（TFT）基板组件包括基板，设置在基板的内表面上的多个栅极线，与栅极线绝缘的多条数据线。 多个栅极线和多条数据线限定多个像素区域。 每个像素区域包括第一开关元件，第二开关元件，第一像素电极和第二像素电极。 第一开关元件和第二开关元件与多条栅极线与相同的栅极线连接。 第一像素电极经由第一开关元件从来自多条数据线的数据线施加数据信号。 第二像素电极经由第二开关元件和分压元件施加来自多条数据线的数据线的数据信号。