公开(公告)号：US20190131429A1

公开(公告)日：2019-05-02

申请号：US15797837

申请日：2017-10-30

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Jiehui Shu ,  Chang Seo Park ,  Shimpei Yamaguchi ,  Tao Han ,  Yong Mo Yang ,  Jinping Liu ,  Hyuck Soo Yang

IPC: H01L29/66 ,  H01L27/088 ,  H01L21/8234

Abstract: One illustrative method disclosed herein includes, among other things, forming a sacrificial gate structure above a semiconductor substrate, the sacrificial gate structure comprising a sacrificial gate insulation layer and a sacrificial gate electrode material, performing a first gate-cut etching process to thereby form an opening in the sacrificial gate electrode material and forming an internal sidewall spacer in the opening. In this example, the method also includes, after forming the internal sidewall spacer, performing a second gate-cut etching process through the opening, the second gate-cut etching process being adapted to remove the sacrificial gate electrode material, performing an oxidizing anneal process and forming an insulating material in at least the opening.

公开(公告)号：US20180151690A1

公开(公告)日：2018-05-31

申请号：US15875055

申请日：2018-01-19

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Tao Han ,  Zhenyu Hu ,  Jinping Liu ,  Hsien-Ching Lo ,  Jianwei Peng

IPC: H01L29/66 ,  H01L21/02 ,  H01L29/78

CPC classification number: H01L29/6656 ,  H01L21/02126 ,  H01L21/0214 ,  H01L21/022 ,  H01L21/02211 ,  H01L21/0228 ,  H01L29/66795 ,  H01L29/785

Abstract: Structures for spacers in a device structure for a field-effect transistor and methods for forming spacers in a device structure for a field-effect transistor. A first spacer is located adjacent to a vertical sidewall of a gate electrode, a second spacer located between the first spacer and the vertical sidewall of the gate electrode, and a third spacer located between the second spacer and the vertical sidewall of the gate electrode. The first spacer has a higher dielectric constant than the second spacer. The first spacer has a higher dielectric constant than the third spacer. The third spacer has a lower dielectric constant than the second spacer.

公开(公告)号：US10453936B2

公开(公告)日：2019-10-22

申请号：US15797837

申请日：2017-10-30

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Jiehui Shu ,  Chang Seo Park ,  Shimpei Yamaguchi ,  Tao Han ,  Yong Mo Yang ,  Jinping Liu ,  Hyuck Soo Yang

IPC: H01L29/66 ,  H01L21/8234 ,  H01L27/088

Abstract: One illustrative method disclosed herein includes, among other things, forming a sacrificial gate structure above a semiconductor substrate, the sacrificial gate structure comprising a sacrificial gate insulation layer and a sacrificial gate electrode material, performing a first gate-cut etching process to thereby form an opening in the sacrificial gate electrode material and forming an internal sidewall spacer in the opening. In this example, the method also includes, after forming the internal sidewall spacer, performing a second gate-cut etching process through the opening, the second gate-cut etching process being adapted to remove the sacrificial gate electrode material, performing an oxidizing anneal process and forming an insulating material in at least the opening.

公开(公告)号：US10008456B1

公开(公告)日：2018-06-26

申请号：US15469983

申请日：2017-03-27

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Tao Han ,  Man Gu ,  Jinping Liu

IPC: H01L23/58 ,  H01L29/66 ,  H01L21/28 ,  H01L21/8234 ,  H01L21/60

CPC classification number: H01L21/28141 ,  H01L21/02126 ,  H01L21/02167 ,  H01L21/022 ,  H01L21/02211 ,  H01L21/0228 ,  H01L29/6656 ,  H01L2021/6009

Abstract: Structures for spacers in a device structure for a field-effect transistor and methods for forming spacers in a device structure for a field-effect transistor. First and second spacers are formed adjacent to a surface of a device component from respective conformal layers. The first spacer is positioned between the surface of the device component and the second spacer. The second spacer includes a plurality of first lamina and a plurality of second lamina that are arranged in an alternating sequence with the first lamina. The first spacer has a first dielectric constant, and the second spacer has a second dielectric constant that is greater than the first dielectric constant.

公开(公告)号：US09947769B1

公开(公告)日：2018-04-17

申请号：US15363461

申请日：2016-11-29

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Tao Han ,  Zhenyu Hu ,  Jinping Liu ,  Hsien-Ching Lo ,  Jianwei Peng

IPC: H01L29/66 ,  H01L29/78 ,  H01L21/02

CPC classification number: H01L29/6656 ,  H01L21/0214 ,  H01L21/0228 ,  H01L29/66795 ,  H01L29/785

Abstract: Structures for spacers in a device structure for a field-effect transistor and methods for forming spacers in a device structure for a field-effect transistor. A first spacer is located adjacent to a vertical sidewall of a gate electrode, a second spacer is located between the first spacer and the vertical sidewall of the gate electrode, and a third spacer is located between the second spacer and the vertical sidewall of the gate electrode. The first spacer has a higher dielectric constant than the second spacer. The first spacer has a higher dielectric constant than the third spacer. The third spacer has a lower dielectric constant than the second spacer.

公开(公告)号：US09419101B1

公开(公告)日：2016-08-16

申请号：US14932394

申请日：2015-11-04

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Jianwei Peng ,  Hong Yu ,  Zhao Lun ,  Tao Han ,  Hsien-Ching Lo ,  Basab Banerjee ,  Wen Zhi Gao ,  Byoung-Gi Min

IPC: H01L21/8232 ,  H01L29/66 ,  H01L29/78 ,  H01L27/108 ,  H01L27/088 ,  H01L21/8234

CPC classification number: H01L29/6656 ,  H01L21/823431 ,  H01L27/0886 ,  H01L27/10879 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/785

Abstract: A method of forming spacers and the resulting fin-shaped field effect transistors are provided. Embodiments include forming a silicon (Si) fin over a substrate; forming a polysilicon gate over the Si fin; and forming a spacer on top and side surfaces of the polysilicon gate, and on exposed upper and side surfaces of the Si fin, the spacer including: a first layer and second layer having a first dielectric constant, and a third layer formed between the first and second layers and having a second dielectric constant, wherein the second dielectric constant is lower than the first dielectric constant.

Abstract translation: 提供了形成间隔物的方法和所得的鳍状场效应晶体管。 实施例包括在衬底上形成硅（Si）鳍; 在Si鳍上形成多晶硅栅极; 以及在所述多晶硅栅极的顶表面和侧表面上形成间隔物，并且在所述Si鳍的暴露的上表面和外表面上，所述间隔物包括：具有第一介电常数的第一层和第二层，以及形成在所述第一 和第二层并具有第二介电常数，其中第二介电常数低于第一介电常数。