公开(公告)号：US11315951B2

公开(公告)日：2022-04-26

申请号：US17094931

申请日：2020-11-11

Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

Inventor： Sung-Jae Chang ,  Dong Min Kang ,  Sung-Bum Bae ,  Hyung Sup Yoon ,  Kyu Jun Cho

IPC: H01L27/12 ,  H01L21/84 ,  H01L21/683 ,  H01L23/31

Abstract: Provided are a semiconductor device and a method of fabricating the same. The semiconductor device includes a substrate having a first region and a second region, a buffer layer disposed on the substrate, a semiconductor layer disposed on the buffer layer, a barrier layer disposed on the semiconductor layer, a first source electrode, a first drain electrode, and a first gate electrode disposed therebetween, which are disposed on the barrier layer in the first region, a second source electrode, a second drain electrode, and a second gate electrode disposed therebetween, which are disposed on the barrier layer in the second region, and a ferroelectric pattern interposed between the first gate electrode and the barrier layer.

公开(公告)号：US10651107B2

公开(公告)日：2020-05-12

申请号：US16134286

申请日：2018-09-18

Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

Inventor： Hyung Seok Lee ,  Zin-Sig Kim ,  Sung-Bum Bae

IPC: H01L23/367 ,  H01L25/065 ,  H01L23/538 ,  H01L23/00 ,  H01L23/373 ,  H01L29/20 ,  H01L29/778

Abstract: Provided are a semiconductor device and a method for fabricating the same. The semiconductor device includes a heat dissipation plate including a first region and a second region, a first element disposed on the heat dissipation plate in the first region, and a second element disposed on the heat dissipation plate in the second region. The first element includes a first substrate, the second element includes a second substrate, the first substrate includes a material different from a material of the second substrate, the first substrate contacts the heat dissipation plate, and the second element is bonded to the heat dissipation plate in a flip-chip bonding manner.

公开(公告)号：US09337121B2

公开(公告)日：2016-05-10

申请号：US14324724

申请日：2014-07-07

Applicant: Electronics and Telecommunications Research Institute

Inventor： Chi Hoon Jun ,  Sang Choon Ko ,  Seok-Hwan Moon ,  Woojin Chang ,  Sung-Bum Bae ,  Young Rak Park ,  Je Ho Na ,  Jae Kyoung Mun ,  Eun Soo Nam

IPC: H01L23/367 ,  H01L21/308 ,  H01L23/473 ,  H01L23/467 ,  H01L21/3065 ,  H01L21/3205

CPC classification number: H01L21/3065 ,  H01L21/3081 ,  H01L21/32051 ,  H01L23/367 ,  H01L23/467 ,  H01L23/473 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Provided are a semiconductor device and a method of fabricating the same. The semiconductor device includes: an active region provided on a substrate; an inlet channel formed as a single cavity buried in one side of the substrate; an outlet channel formed as a single cavity buried in the other side of the substrate; a micro channel array comprising a plurality of micro channels, wherein the plurality of micro channels are formed as a plurality of cavities buried in the substrate, and one end of the micro channel array is connected to a side of the inlet channel and the other end of the micro channel array is connected to a side of the outlet channel; and a micro heat sink array separating the micro channels from one another.

Abstract translation: 提供半导体器件及其制造方法。 半导体器件包括：设置在衬底上的有源区; 入口通道形成为隐藏在所述基板的一侧中的单个腔; 出口通道形成为埋在基板的另一侧中的单个腔; 微通道阵列，其包括多个微通道，其中所述多个微通道形成为埋在所述衬底中的多个空腔，并且所述微通道阵列的一端连接到所述入口通道的一侧，而另一端 的微通道阵列连接到出口通道的一侧; 以及将微通道彼此分离的微型散热器阵列。

公开(公告)号：US08941231B2

公开(公告)日：2015-01-27

申请号：US13938324

申请日：2013-07-10

Applicant: Electronics and Telecommunications Research Institute

Inventor： Young Rak Park ,  Sang Choon Ko ,  Byoung-Gue Min ,  Jong-Won Lim ,  Hokyun Ahn ,  Sung-Bum Bae ,  Jae Kyoung Mun ,  Eun Soo Nam

IPC: H01L23/12 ,  H01L29/66 ,  H01L23/522 ,  H01L23/532 ,  H01L23/66

CPC classification number: H01L29/66477 ,  H01L23/5225 ,  H01L23/5228 ,  H01L23/5329 ,  H01L23/66 ,  H01L2223/6627 ,  H01L2223/6683 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Provided are an electronic chip and a method of fabricating the same. The semiconductor chip may include a substrate, an active device integrated on the substrate, a lower interlayered insulating layer covering the resulting structure provided with the active device, a passive device provided on the lower interlayered insulating layer, an upper interlayered insulating layer covering the resulting structure provided with the passive device, and a ground electrode provided on the upper interlayered insulating layer. The upper interlayered insulating layer may be formed of a material, whose dielectric constant may be higher than that of the lower interlayered insulating layer.

Abstract translation: 提供一种电子芯片及其制造方法。 半导体芯片可以包括衬底，集成在衬底上的有源器件，覆盖所提供的有源器件的结构的下层间绝缘层，设置在下层间绝缘层上的无源器件，覆盖所得到的上层间绝缘层 设置有无源器件的结构，以及设置在上层间绝缘层上的接地电极。 上层间绝缘层可以由其介电常数可能高于下层间绝缘层的材料的材料形成。