公开(公告)号：US20220285244A1

公开(公告)日：2022-09-08

申请号：US17562587

申请日：2021-12-27

Applicant: Electronics and Telecommunications Research Institute

Inventor： Il Gyu CHOI ,  Seong Il KIM ,  Hae Cheon KIM ,  Youn Sub NOH ,  Ho Kyun AHN ,  Sang Heung LEE ,  Jong Won LIM ,  Sung Jae CHANG ,  Hyun Wook JUNG

IPC: H01L23/373

Abstract: The present invention improves a heat dissipation property of a semiconductor device by transferring hexagonal boron nitride (hBN) with a two-dimensional nanostructure to the semiconductor device. A semiconductor device of the present invention includes a substrate having a first surface and a second surface, a semiconductor layer formed on the first surface of the substrate, an hBN layer formed on at least one surface of the first surface and the second surface of the substrate, and a heat sink positioned on the second surface of the substrate. A radiation rate of heat generated during driving of an element is increased to decrease a reduction in lifetime of a semiconductor device due to a temperature increase. The semiconductor device has a structure and configuration which are very effective in improving a rapid temperature increase due to heat generated by high-power semiconductor devices.

公开(公告)号：US20220020671A1

公开(公告)日：2022-01-20

申请号：US17380583

申请日：2021-07-20

Applicant: Electronics and Telecommunications Research Institute

Inventor： Dong Yun JUNG ,  Hyun Gyu JANG ,  Sung Kyu KWON ,  Kun Sik PARK ,  Jong Il WON ,  Seong Hyun LEE ,  Jong Won LIM ,  Doo Hyung CHO

IPC: H01L23/495 ,  H01L23/00

Abstract: The present invention minimizes parasitic inductance at the time of packaging a semiconductor that requires high efficiency and high-speed switching driving. In implementing a semiconductor package composed of one or more switching devices and one or more diode devices, the present invention provides a flip-stack structure in which a switching device is mounted on an insulating substrate or a metal frame, a flat metal is bonded onto the switching device, and a diode device is flipped and stacked on the flat metal, and accordingly, the flat metal with a large area is used for connection between the devices and between the devices and the insulating substrate, thereby minimizing parasitic inductance generated at a time of semiconductor packaging and automating the entire process of the semiconductor packaging.

公开(公告)号：US20150236108A1

公开(公告)日：2015-08-20

申请号：US14328247

申请日：2014-07-10

Applicant: Electronics and Telecommunications Research Institute

Inventor： Seong Il KIM ,  Dong Min KANG ,  Sang Heung LEE ,  Ho Kyun AHN ,  Hyung Sup YOON ,  Byoung Gue MIN ,  Jong Won LIM

IPC: H01L29/423 ,  H01L21/283 ,  H01L29/778

CPC classification number: H01L29/42312 ,  H01L21/28114 ,  H01L21/28587 ,  H01L21/28593 ,  H01L29/42316 ,  H01L29/66863 ,  H01L29/778 ,  H01L29/812

Abstract: Disclosed are a semiconductor device having a stable gate structure, and a manufacturing method thereof, in which a gate structure is stabilized by additionally including a plurality of gate feet under a gate head in a width direction of the gate head so as to serve as supporters in a gate structure including a fine gate foot having a length of 0.2 μm or smaller, and the gate head having a predetermined size. Accordingly, it is possible to prevent the gate electrode of the semiconductor device from collapsing, and improve reliability of the semiconductor device during or after the process of the semiconductor device.

Abstract translation: 公开了一种具有稳定的栅极结构的半导体器件及其制造方法，其中通过在栅极头的宽度方向上的栅极头附近还包括多个栅极脚来稳定栅极结构，以作为支撑体 在包括具有0.2μm或更小的长度的精细栅极脚的栅极结构中，并且栅极头具有预定尺寸。 因此，可以防止半导体器件的栅电极塌陷，并且在半导体器件的处理期间或之后提高半导体器件的可靠性。