公开(公告)号：US20240136105A1

公开(公告)日：2024-04-25

申请号：US18383816

申请日：2023-10-25

Applicant: Cirrus Logic International Semiconductor Ltd.

Inventor： Aleksey Khenkin ,  David Patten ,  Jun Yan

IPC: H01F27/28 ,  H01F17/00 ,  H01F27/24

CPC classification number: H01F27/2804 ,  H01F17/0013 ,  H01F27/24 ,  H01F41/08

Abstract: A method for constructing a solenoid inductor of an IC package with active/passive devices includes positioning an inner winding substantially around a magnetic core, positioning an outer winding substantially around the inner winding, and using a layered process to perform positioning the inner and outer windings. The layered process includes processing a first conducting layer as a bottom layer of the outer winding, above processing a first dielectric layer, above processing a second conducting layer as a bottom layer of the inner winding, above processing a second dielectric layer, above processing a magnetic core layer, above processing a third dielectric layer, above processing a third conducting layer as a top layer of the inner winding, above processing a fourth dielectric layer, above processing a fourth conducting layer as a top layer of the outer winding, above processing a fifth dielectric layer, and the inner and outer windings are electrically connected.

公开(公告)号：US11662821B2

公开(公告)日：2023-05-30

申请号：US16850904

申请日：2020-04-16

Applicant: Cirrus Logic International Semiconductor Ltd.

Inventor： Aleksey Khenkin ,  Jun Yan ,  Marco Janko ,  Michael McKnight

IPC: G06F3/01 ,  G01R33/028 ,  H02N11/00 ,  H02N2/14 ,  H02N1/00 ,  H01L41/04 ,  H01L41/09 ,  H01L41/083

CPC classification number: G06F3/016 ,  G01R33/028 ,  H02N1/006 ,  H02N2/14 ,  H02N2/142 ,  H02N11/00 ,  H01L41/042 ,  H01L41/083 ,  H01L41/09

Abstract: A method may include measuring an electrical parameter of an electromagnetic load having a moving mass during the absence of a driving signal actively driving the electromagnetic load, measuring a mechanical parameter of mechanical motion of a host device comprising the electromagnetic load, correlating a relationship between the mechanical parameter and the electrical parameter, and calibrating the electromagnetic load across a plurality of mechanical motion conditions based on the relationship.

公开(公告)号：US20220384413A1

公开(公告)日：2022-12-01

申请号：US17303251

申请日：2021-05-25

Applicant: Cirrus Logic International Semiconductor Ltd.

Inventor： Aleksey Khenkin ,  Justin Richardson ,  Michael Robinson ,  David Patten

IPC: H01L27/02 ,  H01L23/66 ,  H01L21/78 ,  H01L23/498 ,  H03F3/187 ,  H03F3/45

Abstract: A packaged semiconductor die may include a package terminal array comprising a plurality of terminals, wherein a spacing between the plurality of terminals of the ball grid array is less than 0.5 mm. First and second high-voltage circuits of the die may output a differential signal to a first and second terminal that may exceed 15 volts, in which the first high-voltage circuit and the second high-voltage circuit are positioned symmetrically around an axis and in which the first terminal and the second terminal are located at an edge of the package terminal array. A low-voltage circuit may be coupled to a third terminal and positioned between the first high-voltage circuit and the second high-voltage circuit, wherein the low-voltage circuit comprises circuitry organized in columns aligned along an axis and having a width defined by a fraction of the terminal spacing pitch.