公开(公告)号：US08937317B2

公开(公告)日：2015-01-20

申请号：US13730619

申请日：2012-12-28

Applicant: Avogy, Inc.

Inventor： Donald R. Disney ,  Hemal N. Shah

IPC: H01L31/0256 ,  H01L27/06 ,  H01L23/00 ,  H01L29/872

CPC classification number: H01L21/50 ,  H01L21/8252 ,  H01L23/49513 ,  H01L23/49517 ,  H01L23/49562 ,  H01L23/49575 ,  H01L24/05 ,  H01L24/37 ,  H01L24/40 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L24/84 ,  H01L24/85 ,  H01L27/0605 ,  H01L27/0629 ,  H01L29/2003 ,  H01L29/872 ,  H01L2021/6027 ,  H01L2224/04034 ,  H01L2224/04042 ,  H01L2224/05552 ,  H01L2224/05556 ,  H01L2224/0603 ,  H01L2224/2919 ,  H01L2224/32245 ,  H01L2224/37147 ,  H01L2224/40247 ,  H01L2224/45014 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73263 ,  H01L2224/73265 ,  H01L2224/83801 ,  H01L2224/83805 ,  H01L2224/8384 ,  H01L2224/83855 ,  H01L2224/92246 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/1033 ,  H01L2924/12032 ,  H01L2924/1305 ,  H01L2924/13062 ,  H01L2924/13091 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2924/0665

Abstract: An electronic package includes a leadframe, a plurality of pins, a gallium-nitride (GaN) transistor, and a GaN diode. The GaN transistor includes a drain region, a drift region, a source region, and a gate region; the drain region includes a GaN substrate and a drain contact, the drift region includes a first GaN epitaxial layer coupled to the GaN substrate, the source region includes a source contact and is separated from the GaN substrate by the drift region, and the gate region includes a second GaN epitaxial layer and a gate contact. The GaN diode includes an anode region and a cathode region, the cathode region including the GaN substrate and a cathode contact, and the anode region including a third GaN epitaxial layer coupled to the GaN substrate and an anode contact. The drain contact and the anode contact are electrically connected to the leadframe.

Abstract translation: 电子封装包括引线框，多个引脚，氮化镓（GaN）晶体管和GaN二极管。 GaN晶体管包括漏极区，漂移区，源极区和栅极区; 所述漏极区包括GaN衬底和漏极接触，所述漂移区包括耦合到所述GaN衬底的第一GaN外延层，所述源极区包括源极接触并且通过所述漂移区与所述GaN衬底分离，并且所述栅极区 包括第二GaN外延层和栅极接触。 GaN二极管包括阳极区域和阴极区域，阴极区域包括GaN衬底和阴极接触，并且阳极区域包括耦合到GaN衬底的第三GaN外延层和阳极接触。 漏极触点和阳极触点电连接到引线框架。

公开(公告)号：US09324645B2

公开(公告)日：2016-04-26

申请号：US13901546

申请日：2013-05-23

Applicant: AVOGY, INC.

Inventor： Donald R. Disney ,  Hemal N. Shah

IPC: H01L31/0256 ,  H01L23/495 ,  H01L29/861 ,  H01L29/20 ,  H01L23/00

CPC classification number: H01L23/49575 ,  H01L23/49541 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/83 ,  H01L29/2003 ,  H01L29/8611 ,  H01L2224/0603 ,  H01L2224/291 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/32245 ,  H01L2224/40247 ,  H01L2224/45014 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/48247 ,  H01L2224/49113 ,  H01L2224/73265 ,  H01L2224/83801 ,  H01L2224/83805 ,  H01L2224/8384 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/12032 ,  H01L2924/1305 ,  H01L2924/13062 ,  H01L2924/13091 ,  H01L2924/00 ,  H01L2924/014 ,  H01L2924/20755 ,  H01L2924/20756 ,  H01L2924/20757 ,  H01L2924/20758 ,  H01L2924/20759 ,  H01L2924/2076

Abstract: An electronic package includes a leadframe and a plurality of pins. The electronic package also includes a first gallium nitride (GaN) transistor comprising a source, gate, and drain and a second GaN transistor comprising a source, gate, and drain. The source of the first GaN transistor is electrically connected to the leadframe and the drain of the second GaN transistor is electrically connected to the leadframe. The electronic package further includes a first GaN diode comprising an anode and cathode and a second GaN diode comprising an anode and cathode. The anode of the first GaN diode is electrically connected to the leadframe and the cathode of the second GaN diode is electrically connected to the leadframe.

Abstract translation: 电子封装包括引线框和多个引脚。 电子封装还包括包括源极，栅极和漏极的第一氮化镓（GaN）晶体管和包括源极，栅极和漏极的第二GaN晶体管。 第一GaN晶体管的源极电连接到引线框架，并且第二GaN晶体管的漏极电连接到引线框架。 电子封装还包括包括阳极和阴极的第一GaN二极管和包括阳极和阴极的第二GaN二极管。 第一GaN二极管的阳极电连接到引线框架，并且第二GaN二极管的阴极电连接到引线框架。

公开(公告)号：US20150326140A1

公开(公告)日：2015-11-12

申请号：US14803552

申请日：2015-07-20

Applicant: AVOGY, INC.

Inventor： Sitthipong Angkititrakul ,  Hemal N. Shah

IPC: H02M7/06

CPC classification number: H02M7/06 ,  H02M1/126 ,  H02M1/4208 ,  H05K13/00 ,  Y02B70/126 ,  Y10T29/49117

Abstract: An electrical circuit includes an input for an AC input voltage coupled to a first inductive element with first and second outputs coupled to respective first and second nodes, and a four-quadrant (4-Q) switch coupled between the first and second nodes. A capacitor is coupled between the first node and a third node, a second inductive element is coupled between the third node and the second node, and a first bidirectional device and a first diode are coupled in series between a positive output node and a negative output node. A first output of the second inductive element is coupled between the first bidirectional device and the first diode. A second bidirectional device and a second diode are coupled in series between the positive output node and the negative output node. A second output of the second inductive element is coupled between the second bidirectional device and the second diode.

Abstract translation: 电路包括用于耦合到第一电感元件的交流输入电压的输入，其中第一和第二输出耦合到相应的第一和第二节点，以及耦合在第一和第二节点之间的四象限（4-Q）开关。 电容器耦合在第一节点和第三节点之间，第二电感元件耦合在第三节点和第二节点之间，并且第一双向设备和第一二极管串联耦合在正输出节点和负输出 节点。 第二电感元件的第一输出耦合在第一双向器件和第一二极管之间。 第二双向器件和第二二极管串联耦合在正输出节点和负输出节点之间。 第二电感元件的第二输出耦合在第二双向器件和第二二极管之间。

公开(公告)号：US20150206768A1

公开(公告)日：2015-07-23

申请号：US14562381

申请日：2014-12-05

Applicant: Avogy, Inc.

Inventor： Donald R. Disney ,  Hemal N. Shah

IPC: H01L21/50 ,  H01L23/495 ,  H01L29/20

CPC classification number: H01L21/50 ,  H01L21/8252 ,  H01L23/49513 ,  H01L23/49517 ,  H01L23/49562 ,  H01L23/49575 ,  H01L24/05 ,  H01L24/37 ,  H01L24/40 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L24/84 ,  H01L24/85 ,  H01L27/0605 ,  H01L27/0629 ,  H01L29/2003 ,  H01L29/872 ,  H01L2021/6027 ,  H01L2224/04034 ,  H01L2224/04042 ,  H01L2224/05552 ,  H01L2224/05556 ,  H01L2224/0603 ,  H01L2224/2919 ,  H01L2224/32245 ,  H01L2224/37147 ,  H01L2224/40247 ,  H01L2224/45014 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73263 ,  H01L2224/73265 ,  H01L2224/83801 ,  H01L2224/83805 ,  H01L2224/8384 ,  H01L2224/83855 ,  H01L2224/92246 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/1033 ,  H01L2924/12032 ,  H01L2924/1305 ,  H01L2924/13062 ,  H01L2924/13091 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2924/0665 ,  H01L2924/206

Abstract: A method of fabricating an electronic package includes providing a package comprising a leadframe and a plurality of pins and providing a gallium nitride (GaN) transistor comprising a drain contact, a source contact, and a gate contact. The method also includes joining the drain contact to the leadframe and providing a GaN diode comprising an anode contact and a cathode contact. The method further includes joining the anode contact to the leadframe.

Abstract translation: 制造电子封装的方法包括提供包括引线框和多个引脚的封装，并提供包括漏极接触，源极接触和栅极接触的氮化镓（GaN）晶体管。 该方法还包括将漏极接触连接到引线框架并提供包括阳极接触和阴极接触的GaN二极管。 该方法还包括将阳极接触件接合到引线框架。

公开(公告)号：US08947154B1

公开(公告)日：2015-02-03

申请号：US14045708

申请日：2013-10-03

Applicant: Avogy, Inc.

Inventor： Hemal N. Shah ,  Donald R. Disney ,  Heratch Amirkhani Namagerdi

IPC: H03K17/687

CPC classification number: H03K3/012 ,  H01L29/2003 ,  H01L29/7393 ,  H01L29/80 ,  H03K17/04206 ,  H03K17/687

Abstract: An electronic circuit comprising a driver and a main transistor are provided. The driver may include a bias voltage generator, a supplementary transistor, and an output driver. The bias voltage generator may be configured to receive a voltage input and generate a biased voltage output based on the voltage input. The supplementary transistor may have a gate coupled to the biased voltage output of the bias voltage generator, and a source of the supplementary transistor providing a current to the bias voltage generator. The output driver may be configured to receive the biased voltage output from the bias voltage generator and the voltage input, receive the voltage input, and output a drive voltage. The main transistor of the electronic circuit may have a gate, a coupled to the drive voltage, and a drain coupled to a drain of the supplementary transistor.

Abstract translation: 提供了包括驱动器和主晶体管的电子电路。 驱动器可以包括偏置电压发生器，辅助晶体管和输出驱动器。 偏置电压发生器可以被配置为接收电压输入并且基于电压输入产生偏置电压输出。 辅助晶体管可以具有耦合到偏置电压发生器的偏置电压输出的栅极，以及向偏置电压发生器提供电流的辅助晶体管的源极。 输出驱动器可以被配置为接收来自偏置电压发生器和电压输入的偏置电压输出，接收电压输入并输出驱动电压。 电子电路的主晶体管可以具有耦合到驱动电压的栅极和耦合到辅助晶体管的漏极的漏极。

公开(公告)号：US20140346522A1

公开(公告)日：2014-11-27

申请号：US13901546

申请日：2013-05-23

Applicant: AVOGY, INC.

Inventor： Donald R. Disney ,  Hemal N. Shah

IPC: H01L23/495 ,  H01L29/20 ,  H01L23/00

CPC classification number: H01L23/49575 ,  H01L23/49541 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/83 ,  H01L29/2003 ,  H01L29/8611 ,  H01L2224/0603 ,  H01L2224/291 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/32245 ,  H01L2224/40247 ,  H01L2224/45014 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/48247 ,  H01L2224/49113 ,  H01L2224/73265 ,  H01L2224/83801 ,  H01L2224/83805 ,  H01L2224/8384 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/12032 ,  H01L2924/1305 ,  H01L2924/13062 ,  H01L2924/13091 ,  H01L2924/00 ,  H01L2924/014 ,  H01L2924/20755 ,  H01L2924/20756 ,  H01L2924/20757 ,  H01L2924/20758 ,  H01L2924/20759 ,  H01L2924/2076

Abstract: An electronic package includes a leadframe and a plurality of pins. The electronic package also includes a first gallium nitride (GaN) transistor comprising a source, gate, and drain and a second GaN transistor comprising a source, gate, and drain. The source of the first GaN transistor is electrically connected to the leadframe and the drain of the second GaN transistor is electrically connected to the leadframe. The electronic package further includes a first GaN diode comprising an anode and cathode and a second GaN diode comprising an anode and cathode. The anode of the first GaN diode is electrically connected to the leadframe and the cathode of the second GaN diode is electrically connected to the leadframe.

Abstract translation: 电子封装包括引线框和多个引脚。 电子封装还包括包括源极，栅极和漏极的第一氮化镓（GaN）晶体管和包括源极，栅极和漏极的第二GaN晶体管。 第一GaN晶体管的源极电连接到引线框架，并且第二GaN晶体管的漏极电连接到引线框架。 电子封装还包括包括阳极和阴极的第一GaN二极管和包括阳极和阴极的第二GaN二极管。 第一GaN二极管的阳极电连接到引线框架，并且第二GaN二极管的阴极电连接到引线框架。