Method of forming metal layer used in the fabrication of semiconductor device
    11.
    发明申请
    Method of forming metal layer used in the fabrication of semiconductor device 有权
    用于制造半导体器件的金属层的形成方法

    公开(公告)号:US20060084263A1

    公开(公告)日:2006-04-20

    申请号:US11245366

    申请日:2005-10-05

    IPC分类号: H01L21/44

    摘要: A method of forming a metal layer on the conductive region of a semiconductor device includes concurrently supplying a mixture gas including a hydrogen gas and a metal chloride compound gas, and a purge gas into a chamber having a sealed space for a predetermined time, thereby forming a first metal layer on the semiconductor substrate, using a plasma enhanced chemical vapor deposition (PECVD) method. The hydrogen gas and metal chloride gases are thereafter alternately supplied for a predetermined time while the purge gas is continuously supplied into the chamber, thereby forming a second metal layer on the first metal layer, using a PECVD method. Deterioration of semiconductor devices due to high heat by a conventional CVD method can be prevented using a PECVD method as a low temperature process, thereby improving a production yield.

    摘要翻译: 在半导体器件的导电区域上形成金属层的方法包括:将包含氢气和金属氯化物复合气体的混合气体以及吹扫气体同时供给到具有密封空间的室中预定时间,从而形成 使用等离子体增强化学气相沉积(PECVD)方法在半导体衬底上的第一金属层。 然后,将氢气和金属氯化物气体交替供给预定时间,同时将净化气体连续地供应到室中,从而使用PECVD方法在第一金属层上形成第二金属层。 使用PECVD法作为低温处理可以防止由于常规CVD法导致的高热导致的半导体器件劣化,从而提高了生产率。

    Semiconductor devices having multilevel interconnections and methods for manufacturing the same
    13.
    发明授权
    Semiconductor devices having multilevel interconnections and methods for manufacturing the same 有权
    具有多层互连的半导体器件及其制造方法

    公开(公告)号:US06747354B2

    公开(公告)日:2004-06-08

    申请号:US10370222

    申请日:2003-02-19

    IPC分类号: H01L2348

    摘要: A semiconductor device includes a first metal interconnection layer on a semiconductor substrate, an intermetal dielectric layer on the first metal interconnection layer and a second metal interconnection layer formed on the intermetal dielectric layer. A contact stud electrically connects the first and second metal interconnection layers through the intermetal dielectric layer, and includes a titanium/aluminum (TiAlx) core extending from the first metal interconnection layer toward the second metal interconnection layer. In method embodiments, a portion of an insulating layer of a semiconductor substrate is removed to form a hole that exposes an underlying conductive layer. A glue layer, e.g., a titanium (Ti) layer, is formed on bottom and sidewalls of the hole. A Ti seed layer is formed on the glue layer in the hole. An aluminum-containing layer is formed on the Ti seed layer. The substrate is thermally treated to form a contact stud including a TiAlx core.

    摘要翻译: 半导体器件包括在半导体衬底上的第一金属互连层,第一金属互连层上的金属间电介质层和形成在金属间电介质层上的第二金属互连层。 接触柱将第一和第二金属互连层通过金属间电介质层电连接,并且包括从第一金属互连层向第二金属互连层延伸的钛/铝(TiAlx)芯。 在方法实施例中,去除半导体衬底的绝缘层的一部分以形成暴露下面的导电层的孔。 在孔的底部和侧壁上形成胶层,例如钛(Ti)层。 在孔中的胶层上形成Ti种子层。 在Ti种子层上形成含铝层。 将基底热处理以形成包括TiAlx芯的接触柱。

    Methods of forming a metal silicide layer for semiconductor devices
    14.
    发明授权
    Methods of forming a metal silicide layer for semiconductor devices 失效
    形成用于半导体器件的金属硅化物层的方法

    公开(公告)号:US08563429B2

    公开(公告)日:2013-10-22

    申请号:US12704873

    申请日:2010-02-12

    摘要: Methods of forming a metal silicide layer are provided that include exposing polysilicon through just dry etching (JDE) and recessesing an oxide layer through chemical dry etching (CDE). In particular, dry etching is primarily performed to an extent to expose the polysilicon. Then, CDE is secondarily performed to expose the polysilicon. The CDE process includes selecting an etchant source among combinations of NF3 and NH3, HF and NH3, and N2, H2, and NF3, dissociating the etchant source, forming an etchant of NH4F and NH4F.HF through the dissociation, producing solid by-products of (NH4)2SiF6 through the reaction between the etchant and an oxide at a low temperature, and annealing the by-products at a high temperature such that the by-products are sublimated into gas-phase SiF4, NH3, and HF.

    摘要翻译: 提供了形成金属硅化物层的方法,其包括通过刚刚干蚀刻(JDE)暴露多晶硅并通过化学干蚀刻(CDE)凹陷氧化物层。 特别地,干蚀刻主要在暴露多晶硅的程度上进行。 然后,再次执行CDE以暴露多晶硅。 CDE方法包括在NF3和NH3,HF和NH3以及N2,H2和NF3的组合中选择蚀刻源,解离蚀刻剂源,通过解离形成NH4F和NH4F.HF的蚀刻剂,产生固体副产物 的(NH 4)2 SiF 6通过蚀刻剂和氧化物在低温下的反应,并在高温下退火副产物,使得副产物升华成气相SiF 4,NH 3和HF。

    DISPLAY APPARATUS AND METHOD FOR MANUFACTURING THE SAME
    15.
    发明申请
    DISPLAY APPARATUS AND METHOD FOR MANUFACTURING THE SAME 审中-公开
    显示装置及其制造方法

    公开(公告)号:US20130050619A1

    公开(公告)日:2013-02-28

    申请号:US13354484

    申请日:2012-01-20

    摘要: A display apparatus, includes a first display panel, a second display panel disposed opposite the first display panel, the second display panel including one surface having a first region and a second region, the second region surrounding the first region; one or more first spacers in the first region and the second region of the second display panel, the one or more first spacers being in contact with the first display panel; and one or more second spacers in at least one of the first region and the second region of the second display panel, the one or more second spacers being spaced apart from the first display panel, wherein a sum of cross sectional areas of the second spacers in the second region is smaller than a sum of cross sectional areas of second spacers in the first region or is zero.

    摘要翻译: 一种显示装置,包括第一显示面板,与第一显示面板相对设置的第二显示面板,第二显示面板包括具有第一区域和第二区域的一个表面,第二区域围绕第一区域; 所述第一区域中的一个或多个第一间隔物和所述第二显示面板的所述第二区域,所述一个或多个第一间隔物与所述第一显示面板接触; 以及在所述第二显示面板的所述第一区域和所述第二区域中的至少一个区域中的一个或多个第二间隔件,所述一个或多个第二间隔件与所述第一显示面板间隔开,其中所述第二间隔件的横截面面积的总和 在第二区域中的第二区域的面积小于第一区域中的第二间隔物的横截面积的总和,或者为零。

    Filter assembly
    16.
    发明授权
    Filter assembly 有权
    过滤器组件

    公开(公告)号:US07909999B2

    公开(公告)日:2011-03-22

    申请号:US12086514

    申请日:2007-11-19

    IPC分类号: B01D29/00 B01D35/153

    摘要: Disclosed is a filter assembly including a filter cartridge including a housing, a filter provided inside the housing, and a cartridge connection portion provided at an upper portion of the housing, a head portion including a head connection portion to be coupled to the cartridge connection portion so that the filter cartridge can be attached and detached, a water inlet which introduces water to the filter cartridge, and a water outlet which discharges the water filtered by the filter cartridge, the head portion including a filter attaching and detaching lever which is movable between a first position, at which the head connection portion and the filter cartridge connection portion are coupled to each other, and a second position, at which the head connection portion and the filter cartridge connection portion are separated from each other, and can be supported by the head portion.

    摘要翻译: 公开了一种过滤器组件,其包括:过滤器滤芯,包括壳体,设置在壳体内部的过滤器和设置在壳体的上部的盒连接部分,头部部分包括头连接部分,该头部连接部分联接到药筒连接部分 使得过滤器滤芯可以被安装和拆卸,将水引入过滤器滤芯的出水口以及排出由过滤器滤芯过滤的水的出水口,该头部包括过滤器安装和拆卸杆, 第一位置,头部连接部分和过滤器滤芯连接部分彼此连接;第二位置,头部连接部分和过滤器滤芯连接部分彼此分离,并且可以由第二位置支撑 头部。

    METHODS OF FORMING A METAL SILICIDE LAYER FOR SEMICONDUCTOR DEVICES
    17.
    发明申请
    METHODS OF FORMING A METAL SILICIDE LAYER FOR SEMICONDUCTOR DEVICES 失效
    形成用于半导体器件的金属硅化物层的方法

    公开(公告)号:US20100210099A1

    公开(公告)日:2010-08-19

    申请号:US12704873

    申请日:2010-02-12

    IPC分类号: H01L21/28 H01L21/285

    摘要: Methods of forming a metal silicide layer are provided that include exposing polysilicon through just dry etching (JDE) and recessesing an oxide layer through chemical dry etching (CDE). In particular, dry etching is primarily performed to an extent to expose the polysilicon. Then, CDE is secondarily performed to expose the polysilicon. The CDE process includes selecting an etchant source among combinations of NF3 and NH3, HF and NH3, and N2, H2, and NF3, dissociating the etchant source, forming an etchant of NH4F and NH4F.HF through the dissociation, producing solid by-products of (NH4)2SiF6 through the reaction between the etchant and an oxide at a low temperature, and annealing the by-products at a high temperature such that the by-products are sublimated into gas-phase SiF4, NH3, and HF.

    摘要翻译: 提供了形成金属硅化物层的方法,其包括通过刚刚干蚀刻(JDE)暴露多晶硅并通过化学干蚀刻(CDE)凹陷氧化物层。 特别地,干蚀刻主要在暴露多晶硅的程度上进行。 然后,再次执行CDE以暴露多晶硅。 CDE方法包括在NF3和NH3,HF和NH3以及N2,H2和NF3的组合中选择蚀刻源,解离蚀刻剂源,通过解离形成NH4F和NH4F.HF的蚀刻剂,产生固体副产物 的(NH 4)2 SiF 6通过蚀刻剂和氧化物在低温下的反应,并且在高温下退火副产物,使得副产物升华成气相SiF 4,NH 3和HF。

    Filter Assembly
    18.
    发明申请
    Filter Assembly 有权
    过滤组件

    公开(公告)号:US20100163477A1

    公开(公告)日:2010-07-01

    申请号:US12086514

    申请日:2007-11-19

    IPC分类号: B01D35/30

    摘要: Disclosed is a filter assembly including a filter cartridge including a housing, a filter provided inside the housing, and a cartridge connection portion provided at an upper portion of the housing, a head portion including a head connection portion to be coupled to the cartridge connection portion so that the filter cartridge can be attached and detached, a water inlet which introduces water to the filter cartridge, and a water outlet which discharges the water filtered by the filter cartridge, the head portion including a filter attaching and detaching lever which is movable between a first position, at which the head connection portion and the filter cartridge connection portion are coupled to each other, and a second position, at which the head connection portion and the filter cartridge connection portion are separated from each other, and can be supported by the head portion.

    摘要翻译: 公开了一种过滤器组件,其包括:过滤器滤芯,包括壳体,设置在壳体内部的过滤器和设置在壳体的上部的盒连接部分,头部部分包括头连接部分,该头部连接部分联接到药筒连接部分 使得过滤器滤芯可以被安装和拆卸,将水引入过滤器滤芯的出水口以及排出由过滤器滤芯过滤的水的出水口,该头部包括过滤器安装和拆卸杆, 第一位置,头部连接部分和过滤器滤芯连接部分彼此连接;第二位置,头部连接部分和过滤器滤芯连接部分彼此分离,并且可以由第二位置支撑 头部。

    UPPER SUBSTRATE AND LIQUID CRYSTAL DISPLAY DEVICE HAVING THE SAME
    19.
    发明申请
    UPPER SUBSTRATE AND LIQUID CRYSTAL DISPLAY DEVICE HAVING THE SAME 有权
    上层基板和液晶显示装置

    公开(公告)号:US20100045916A1

    公开(公告)日:2010-02-25

    申请号:US12612974

    申请日:2009-11-05

    IPC分类号: G02F1/1333

    摘要: A liquid crystal display apparatus includes a lower substrate, an upper substrate and a liquid crystal layer interposed between the lower substrate and the upper substrate. The lower substrate includes a display part for displaying image and a driving part for providing the display part with a driving signal. The upper substrate includes a common electrode and an insulating member that electrically insulates the common electrode from the driving part. The insulating member has a lower dielectric constant than the liquid crystal layer. Thus, a parasitic capacitance between the driving part and the common electrode is reduced to prevent malfunction of the driving part, and a display quality is enhanced

    摘要翻译: 液晶显示装置包括下基板,上基板和插入在下基板和上基板之间的液晶层。 下基板包括用于显示图像的显示部分和用于向显示部分提供驱动信号的驱动部分。 上基板包括公共电极和使公共电极与驱动部分电绝缘的绝缘构件。 绝缘部件的介电常数比液晶层低。 因此,减小驱动部和公共电极之间的寄生电容,以防止驱动部的故障,提高显示质量

    Method of forming metal layer used in the fabrication of semiconductor device
    20.
    发明授权
    Method of forming metal layer used in the fabrication of semiconductor device 有权
    用于制造半导体器件的金属层的形成方法

    公开(公告)号:US07662717B2

    公开(公告)日:2010-02-16

    申请号:US12100374

    申请日:2008-04-09

    IPC分类号: H01L21/44

    摘要: A method of forming a metal layer on the conductive region of a semiconductor device includes concurrently supplying a mixture gas including a hydrogen gas and a metal chloride compound gas, and a purge gas into a chamber having a sealed space for a predetermined time, thereby forming a first metal layer on the semiconductor substrate, using a plasma enhanced chemical vapor deposition (PECVD) method. The hydrogen gas and metal chloride gases are thereafter alternately supplied for a predetermined time while the purge gas is continuously supplied into the chamber, thereby forming a second metal layer on the first metal layer, using a PECVD method. Deterioration of semiconductor devices due to high heat by a conventional CVD method can be prevented using a PECVD method as a low temperature process, thereby improving a production yield.

    摘要翻译: 在半导体器件的导电区域上形成金属层的方法包括:将包含氢气和金属氯化物复合气体的混合气体以及吹扫气体同时供给到具有密封空间的室中预定时间,从而形成 使用等离子体增强化学气相沉积(PECVD)方法在半导体衬底上的第一金属层。 然后,将氢气和金属氯化物气体交替供给预定时间,同时将净化气体连续地供应到室中,从而使用PECVD方法在第一金属层上形成第二金属层。 使用PECVD法作为低温处理可以防止由于常规CVD法导致的高热导致的半导体器件劣化,从而提高了生产率。