公开(公告)号：US20230223413A1

公开(公告)日：2023-07-13

申请号：US17571856

申请日：2022-01-10

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Hui Zang ,  Gang Chen

IPC: H01L27/146

CPC classification number: H01L27/14614 ,  H01L27/14616 ,  H01L27/14643 ,  H01L27/14689

Abstract: Transistors include trenches formed in the semiconductor substrate having a first conductive type. The trenches define, in a channel width plane of the transistor, at least one nonplanar substrate structure having a plurality of sidewall portions and a tip portion disposed between the plurality of sidewall portions. An epitaxial overlayer is epitaxially grown on the sidewall portions and the tip portion. A channel doping layer having a doped portion of the semiconductor substrate is formed in the nonplanar substrate structure and enclosed by the epitaxial overlayer. An isolation layer is disposed in the trenches and over the epitaxial overlayer. A gate is disposed on the isolation layer and extends into the trenches.

公开(公告)号：US11695029B2

公开(公告)日：2023-07-04

申请号：US17556141

申请日：2021-12-20

Applicant: OmniVision Technologies, Inc.

Inventor： Hui Zang ,  Gang Chen

IPC: H01L27/146

CPC classification number: H01L27/14643 ,  H01L27/14601 ,  H01L27/14605 ,  H01L27/14683

Abstract: A method for forming a pixel includes forming, in a semiconductor substrate, a wide trench having an upper depth with respect to a planar top surface of the semiconductor substrate. The method also includes ion-implanting a floating-diffusion region between the planar top surface and a junction depth in the semiconductor substrate. In a cross-sectional plane perpendicular to the planar top surface, the floating-diffusion region has (i) an upper width between the planar top surface and the upper depth, and (ii) between the upper depth and the junction depth, a lower width that exceeds the upper width. Part of the floating-diffusion region is beneath the wide trench and between the upper depth and the junction depth.

公开(公告)号：US11538836B2

公开(公告)日：2022-12-27

申请号：US16993018

申请日：2020-08-13

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Hui Zang ,  Gang Chen ,  Chao Niu ,  Zhiqiang Lin

IPC: H01L27/146

Abstract: A pixel cell includes a photodiode disposed proximate to a front side of a semiconductor layer to generate image charge in response to incident light directed through a backside of the semiconductor layer. A cell deep trench isolation (CDTI) structure is disposed along an optical path of the incident light to the photodiode and proximate to the backside of the semiconductor layer. The CDTI structure includes a plurality of portions arranged in the semiconductor layer. Each of the plurality of portions extends a respective depth from the backside towards the front side of the semiconductor layer. The respective depth of each of the plurality of portions is different than a respective depth of a neighboring one of the plurality of portions. Each of the plurality of portions is laterally separated and spaced apart from said neighboring one of the plurality of portions in the semiconductor layer.

公开(公告)号：US20220328545A1

公开(公告)日：2022-10-13

申请号：US17229664

申请日：2021-04-13

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Hui Zang ,  Gang Chen

IPC: H01L27/146 ,  H04N5/378 ,  H04N5/3745

Abstract: A pixel circuit includes a photodiode and a floating diffusion disposed in a semiconductor substrate. A transfer gate is disposed between the photodiode and the floating diffusion to transfer photogenerated image charge from the photodiode to the floating diffusion. A dual floating diffusion (DFD) transistor is coupled between the floating diffusion and a DFD capacitor. The DFD transistor includes a DFD gate that includes a planar gate portion disposed over a surface of the semiconductor substrate and a vertical gate portion that extends vertically from the planar gate portion into the semiconductor substrate. The vertical gate portion of the DFD gate is configured to increase a gate to substrate coupling capacitance of the DFD transistor. The gate to substrate coupling capacitance and the DFD capacitor are coupled to increase an effective capacitance associated with the floating diffusion in response to the DFD transistor being turned on.

公开(公告)号：US11450696B1

公开(公告)日：2022-09-20

申请号：US17229664

申请日：2021-04-13

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Hui Zang ,  Gang Chen

IPC: H04N5/374 ,  H04N5/378 ,  H04N5/355 ,  H01L27/146 ,  H04N5/3745

Abstract: A pixel circuit includes a photodiode and a floating diffusion disposed in a semiconductor substrate. A transfer gate is disposed between the photodiode and the floating diffusion to transfer photogenerated image charge from the photodiode to the floating diffusion. A dual floating diffusion (DFD) transistor is coupled between the floating diffusion and a DFD capacitor. The DFD transistor includes a DFD gate that includes a planar gate portion disposed over a surface of the semiconductor substrate and a vertical gate portion that extends vertically from the planar gate portion into the semiconductor substrate. The vertical gate portion of the DFD gate is configured to increase a gate to substrate coupling capacitance of the DFD transistor. The gate to substrate coupling capacitance and the DFD capacitor are coupled to increase an effective capacitance associated with the floating diffusion in response to the DFD transistor being turned on.

公开(公告)号：US20220059600A1

公开(公告)日：2022-02-24

申请号：US16998815

申请日：2020-08-20

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Qin Wang ,  Gang Chen

IPC: H01L27/146

Abstract: A device includes a photodiode, a floating diffusion region, a transfer gate, and a channel region. The photodiode is disposed in a semiconductor material. The photodiode is coupled to generate charges in response to incident light. The photodiode has a substantially uniform doping profile throughout a depth of the photodiode in the semiconductor material. The floating diffusion region is disposed in the semiconductor material. The transfer gate is disposed between the photodiode and the floating diffusion region, wherein the transfer gate includes a plurality of fin structures. The channel region associated with the transfer gate is in the semiconductor material proximate to the transfer gate. The transfer gate is coupled to transfer the charge from the photodiode to the floating diffusion region through the channel region in response to a transfer signal coupled to be received by the transfer gate.

公开(公告)号：US11245823B2

公开(公告)日：2022-02-08

申请号：US16539931

申请日：2019-08-13

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Gang Chen ,  Yuanwei Zheng ,  Qin Wang ,  Cunyu Yang ,  Guannan Chen ,  Duli Mao ,  Dyson H. Tai ,  Lindsay Alexander Grant

IPC: H04N5/225 ,  G02B7/00 ,  G02B5/20 ,  G02B3/00 ,  H01L27/146

Abstract: An image sensor includes a substrate. An array of photodiodes is disposed in the substrate. A plurality of spacers is arranged in a spacer pattern. At least one spacer of the plurality of spacers has an aspect ratio of 18:1 or greater. A buffer layer is disposed between the substrate and the spacer pattern. An array of color filters is disposed in the spacer pattern.

公开(公告)号：US11244979B2

公开(公告)日：2022-02-08

申请号：US16720236

申请日：2019-12-19

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Hui Zang ,  Gang Chen

IPC: H01L27/146

Abstract: A semiconductor structure for a CMOS image sensor includes a semiconductor substrate having a first side and a second side. A photodiode is disposed in the semiconductor substrate proximate to the first side. The photodiode accumulates image charge photogenerated in the photodiode in response to incident light directed through the second side. A deep trench isolation structure enclosing the photodiode. The deep trench isolation structure extends from the second side toward the first side. The deep trench isolation structure includes a light absorption region disposed at a first end of the deep trench isolation structure toward the first side.

公开(公告)号：US20210057466A1

公开(公告)日：2021-02-25

申请号：US16548697

申请日：2019-08-22

Applicant: OmniVision Technologies, Inc.

Inventor： Qin Wang ,  Gang Chen

IPC: H01L27/146

Abstract: A pixel array includes a semiconductor substrate, a plurality of isolation layer segments, and a plurality of photodiodes. Each of the plurality of isolation layer segments extends through the semiconductor substrate in a first direction. Each of the plurality of isolation layer segments encloses a portion of the semiconductor substrate in a plane perpendicular to the first direction. The plurality of isolation layer segments form a grid that defines a plurality of isolated sections of the semiconductor substrate. The plurality of isolated sections of the semiconductor substrate include the portions of the semiconductor substrate. Each of the photodiodes is formed in a respective one of the plurality of isolated sections of the semiconductor substrate.

公开(公告)号：US20210051250A1

公开(公告)日：2021-02-18

申请号：US16539931

申请日：2019-08-13

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Gang Chen ,  Yuanwei Zheng ,  Qin Wang ,  Cunyu Yang ,  Guannan Chen ,  Duli Mao ,  Dyson H. Tai ,  Lindsay Alexander Grant

IPC: H04N5/225 ,  G02B5/20 ,  G02B7/00

Abstract: An image sensor includes a substrate. An array of photodiodes is disposed in the substrate. A plurality of spacers is arranged in a spacer pattern. At least one spacer of the plurality of spacers has an aspect ratio of 18:1 or greater. A buffer layer is disposed between the substrate and the spacer pattern. An array of color filters is disposed in the spacer pattern.