Method and device for predicting defects

    公开(公告)号:US12298749B2

    公开(公告)日:2025-05-13

    申请号:US17748241

    申请日:2022-05-19

    Abstract: A method and device for predicting a defect. The method includes determining a sequence between a plurality of sub-models by modeling a production process into the plurality of sub-models, mapping production process data into each of the plurality of sub-models, determining, by a corresponding sub-model, output data comprising defect information on a potential defect occurring in a corresponding step, for each of the plurality of sub-models, predicting information associated with a defect in the production process based on the output data corresponding to each of the plurality of sub-models, and inputting the output data of each of the sub-models to a subsequent sub-model of the corresponding sub-model, based on the sequence.

    Method and apparatus with radar signal processing

    公开(公告)号:US12298429B2

    公开(公告)日:2025-05-13

    申请号:US18496145

    申请日:2023-10-27

    Abstract: A radar signal processing method includes: extracting a first chirp sequence signal of a first carrier frequency and a second chirp sequence signal of a second carrier frequency from a radar signal received through an array antenna in a radar sensor; generating a first range-Doppler map by performing frequency conversion on the first chirp sequence signal; detecting a first target cell corresponding to a first target in the first range-Doppler map; determining a first ambiguous Doppler velocity of the first target based on first frequency information of the first target cell; determining a first range of an unambiguously measurable Doppler velocity through the first chirp sequence signal; estimating second ambiguous Doppler velocities based on the first ambiguous Doppler velocity and the first range; and determining a Doppler velocity of the first target by performing partial frequency conversion on the second chirp sequence signal based on the second ambiguous Doppler velocities.

    Device and method for human body impedance analysis insensitive to high contact impedance and parasitic effects

    公开(公告)号:US12295710B2

    公开(公告)日:2025-05-13

    申请号:US17940655

    申请日:2022-09-08

    Abstract: A device for bioimpedance determining is provided. The device includes contact electrodes for contacting with one part of the user's body and for contacting with another part of the user's body, an alternating current source, a current measurement circuit, a voltage measurement circuit in the region of one of the contact electrodes for contacting with one part of the user's body, and in the region of one of the contact electrodes for contacting with another part of the user's body, a switch connected to the alternating current (AC) source and to the current measurement circuit and configured to form a first and a second current measurement paths so that the current flows through the user's body from one part of the body to another part of the body, and a control unit configured to determine the user's bioimpedance based on the measured current and voltage values.

    ORGANIC LIGHT-EMITTING DISPLAY, HEAD-MOUNTED DISPLAY INCLUDING THE SAME, AND METHOD OF MANUFACTURING THE SAME

    公开(公告)号:US20250151576A1

    公开(公告)日:2025-05-08

    申请号:US18764637

    申请日:2024-07-05

    Abstract: An organic light-emitting display includes a substrate including a first pixel region, a second pixel region, and a division region disposed between the first pixel region and the second pixel region, an insulating layer disposed on the substrate and including a recess disposed in the division region, the insulating layer including a first inner side wall defining a first portion of the recess and a second inner side wall extending from the first inner side wall, defining a second portion of the recess, and having a curved shape, a plurality of pixel electrodes disposed on the insulating layer, a spacer disposed on a side wall of each of the pixel electrodes and the first inner side wall, and a first organic emission layer disposed on the spacer, wherein the spacer includes a material having an etch selectivity different than an etch selectivity of the insulating layer.

    IMAGE SENSOR
    156.
    发明申请

    公开(公告)号:US20250151441A1

    公开(公告)日:2025-05-08

    申请号:US18809676

    申请日:2024-08-20

    Abstract: An image sensor includes a substrate, a first pixel disposed in the substrate, the first pixel including a first photoelectric conversion region, a second pixel disposed adjacent to the first pixel in the substrate, the second pixel including a second photoelectric conversion region, a first floating diffusion region in the first pixel, a second floating diffusion region in the second pixel, an insulation layer on the substrate, and a first buried connect penetrating the insulation layer and connected to the first floating diffusion region and the second floating diffusion region, wherein the first buried connect includes an upper surface and a lower surface, the upper surface of the first buried connect is at a higher vertical level than an upper surface of the insulation layer, and the lower surface of the first buried connect is at a higher or equal vertical level than a lower surface of the insulation layer.

    IMAGE SENSOR AND ELECTRONIC SYSTEM INCLUDING THE SAME

    公开(公告)号:US20250151440A1

    公开(公告)日:2025-05-08

    申请号:US18751960

    申请日:2024-06-24

    Inventor: Kooktae KIM

    Abstract: An image sensor includes unit pixels on a substrate and a pixel isolation structure passing through the substrate in a vertical direction, defining the unit pixels, and having a network-type planar structure. The pixel isolation structure includes a line isolation portion and a corner isolation portion, the line isolation portion linearly extending along a side of each of two adjacent ones of the unit pixels between the two adjacent unit pixels, and the corner isolation portion contacting a corner of each of two adjacent ones of the unit pixels. The pixel isolation structure includes a conductive pillar including a first conductive pillar in the line isolation portion and a second conductive pillar in the corner isolation portion, and an insulating structure surrounding the conductive pillar. The conductive pillar includes a metal pillar having a width in the vertical direction that varies.

    SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME

    公开(公告)号:US20250151327A1

    公开(公告)日:2025-05-08

    申请号:US18666927

    申请日:2024-05-17

    Abstract: A semiconductor device includes a substrate; an active pattern extending on the substrate in a first direction; a plurality of channel layers on the active pattern; a gate structure surrounding the plurality of channel layers, and extending in a second direction that intersects the first direction; blocking insulating layers on both side surfaces of the gate structure, respectively, each of the blocking insulating layers having an upper region having a first thickness and a lower region having a second thickness smaller than the first thickness; source/drain patterns on portions of the active pattern on both sides of the gate structure, the source/drain patterns defining trenches therein; contact structures on the source/drain patterns and filling the trenches; and a metal-semiconductor compound layer between the source/drain patterns and the contact structures.

    HIGH BANDWIDTH MEMORY
    159.
    发明申请

    公开(公告)号:US20250151293A1

    公开(公告)日:2025-05-08

    申请号:US18738574

    申请日:2024-06-10

    Abstract: A high bandwidth memory includes a base die and a memory stack on the base die. The memory stack includes a plurality of memory dies. The memory stack includes a first memory die closest to the base die among the plurality of memory dies and having a first width in a horizontal direction, and a second memory die on the first memory die and having a second width in the horizontal direction, the first width is smaller than the second width.

    SEMICONDUCTOR DEVICES
    160.
    发明申请

    公开(公告)号:US20250151260A1

    公开(公告)日:2025-05-08

    申请号:US18739698

    申请日:2024-06-11

    Abstract: A semiconductor device includes bit line structures spaced apart from each other in a first direction, and each of the bit line structures extends in a second direction; channels on the bit line structures, wherein the channels are electrically connected to the bit line structures and spaced apart from each other in the first direction; a gate insulation pattern structure on sidewalls of each of the channels; a gate electrode structure including: a first gate electrode on a first sidewall of the gate insulation pattern structure; and a second gate electrode on a second sidewall of the gate insulation pattern structure, wherein the second sidewall faces the first sidewall in the second direction, wherein the second gate electrode is on a third sidewall in the first direction of an end portion of the gate insulation pattern structure, and wherein the second gate electrode contacts the first gate electrode.

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