GATE TURN ON VOLTAGE COMPENSATING CIRCUIT, DISPLAY PANEL, DRIVING METHOD AND DISPLAY APPARATUS
    141.
    发明申请
    GATE TURN ON VOLTAGE COMPENSATING CIRCUIT, DISPLAY PANEL, DRIVING METHOD AND DISPLAY APPARATUS 审中-公开
    门开启电压补偿电路,显示面板,驱动方法和显示设备

    公开(公告)号:US20170076657A1

    公开(公告)日:2017-03-16

    申请号:US15086836

    申请日:2016-03-31

    Abstract: The present disclosure provides a gate turn on voltage compensating circuit, a display panel, a driving method and a display apparatus thereof. The gate turn on voltage compensating circuit includes a voltage generation module, a clock control module and a chamfering module. The voltage generation module is used for correspondingly outputting generated first voltage signal and second voltage signal to a first voltage input terminal and a second voltage input terminal of the chamfering module; the clock control module is used for controlling the chamfering module to output corresponding chamfered voltage signals in the corresponding time periods, so that the chamfering depths of gate turn on voltage signals input correspondingly to respective gate drive chips in different time periods are different.

    Abstract translation: 本公开提供了栅极导通电压补偿电路,显示面板,驱动方法和显示装置。 栅极导通电压补偿电路包括电压产生模块,时钟控制模块和倒角模块。 电压产生模块用于将产生的第一电压信号和第二电压信号相应地输出到倒角模块的第一电压输入端子和第二电压输入端子; 时钟控制模块用于控制倒角模块在相应的时间周期内输出相应的倒角电压信号,使不同时间段相应地对应于相应门驱动芯片的栅极导通电压信号的倒角深度不同。

    POWER DETECTION APPARATUS
    142.
    发明申请
    POWER DETECTION APPARATUS 审中-公开
    功率检测装置

    公开(公告)号:US20170059628A1

    公开(公告)日:2017-03-02

    申请号:US15184565

    申请日:2016-06-16

    Inventor: Bo XU

    CPC classification number: G01R21/08 G01R21/06

    Abstract: A power detection apparatus includes: a voltage detection unit configured to detect a voltage of a component to be tested on a circuit board and output a first voltage value; a current detection unit configured to detect a current of the component to be tested and output a second voltage value; a processing unit configured to calculate a power of the component to be tested according to the first and second voltage values; the current detection unit includes a first Hall sensor, a second Hall sensor and an amplifying circuit; a negative electrode of the second Hall sensor is connected to the power supply, a positive electrode of the second Hall sensor is connected to a second input terminal of the amplifying circuit, and an output terminal of the amplifying circuit is connected to the processing unit. The power detection apparatus can realize a power measurement for Micro-power components.

    Abstract translation: 电力检测装置包括:电压检测单元,被配置为检测电路板上要测试的部件的电压并输出第一电压值; 电流检测单元,被配置为检测待测试的组件的电流并输出第二电压值; 处理单元,被配置为根据第一和第二电压值来计算要测试的组件的功率; 电流检测单元包括第一霍尔传感器,第二霍尔传感器和放大电路; 第二霍尔传感器的负极连接到电源,第二霍尔传感器的正电极连接到放大电路的第二输入端,放大电路的输出端连接到处理单元。 功率检测装置可以实现微功率部件的功率测量。

    ARRAY SUBSTRATE, DISPLAY PANEL AND METHOD OF MANUFACTURING THIN FILM TRANSISTOR
    143.
    发明申请
    ARRAY SUBSTRATE, DISPLAY PANEL AND METHOD OF MANUFACTURING THIN FILM TRANSISTOR 有权
    阵列基板,显示面板及制造薄膜晶体管的方法

    公开(公告)号:US20160118415A1

    公开(公告)日:2016-04-28

    申请号:US14744557

    申请日:2015-06-19

    CPC classification number: H01L29/78642 H01L27/1222

    Abstract: An array substrate, a display panel and a method of manufacturing a thin film transistor (TFT) are provided. The array substrate includes a base substrate and a thin film transistor (TFT) formed on the base substrate, and the TFT includes a gate electrode, a gate insulating layer, an active layer, source/drain electrodes and an interlayer insulating layer. The source/drain electrodes include a first electrode and a second electrode, and the interlayer insulating layer is located between the first electrode and the second electrode. The gate electrode, the gate insulating layer and the active layer are arranged sequentially in a direction perpendicular to a thickness direction of the array substrate, and the first electrode, the interlayer insulating layer and the second electrode are arranged sequentially in the thickness direction of the array substrate.

    Abstract translation: 提供阵列基板,显示面板和制造薄膜晶体管(TFT)的方法。 阵列基板包括基底基板和形成在基底基板上的薄膜晶体管(TFT),TFT包括栅电极,栅极绝缘层,有源层,源/漏电极和层间绝缘层。 源极/漏极包括第一电极和第二电极,并且层间绝缘层位于第一电极和第二电极之间。 栅极电极,栅极绝缘层和有源层沿着与阵列基板的厚度方向垂直的方向依次排列,第一电极,层间绝缘层和第二电极在厚度方向依次配置 阵列基板。

    METHOD FOR DRIVING DISPLAY APPARATUS AND DISPLAY APPARATUS
    144.
    发明申请
    METHOD FOR DRIVING DISPLAY APPARATUS AND DISPLAY APPARATUS 有权
    驱动显示设备和显示设备的方法

    公开(公告)号:US20160118004A1

    公开(公告)日:2016-04-28

    申请号:US14800541

    申请日:2015-07-15

    Abstract: A method for driving a display apparatus and a display apparatus are provided. With the method for driving a display apparatus according to the present disclosure, the gate driver circuit, the source driver circuit and the reference voltage generation circuit are controlled not to output any signal during an interval between display of two frames of pictures, so as to solve the problems that a gate driver circuit and a source driver circuit in the existing display apparatus have large power consumption, and operate at an excessive high temperature.

    Abstract translation: 提供了一种用于驱动显示装置和显示装置的方法。 通过根据本公开的驱动显示装置的方法,控制栅极驱动器电路,源极驱动电路和参考电压产生电路,以在两帧图像的显示之间的间隔期间不输出任何信号,从而 解决现有显示装置中的栅极驱动电路和源极驱动电路具有大的功耗,并且在过高的温度下工作的问题。

    ARRAY SUBSTRATE AND DISPLAY DEVICE
    149.
    发明申请

    公开(公告)号:US20250081613A1

    公开(公告)日:2025-03-06

    申请号:US18704903

    申请日:2023-04-28

    Abstract: An array substrate (000) and a display apparatus, relating to the technical field of display. The array substrate (000) comprises: a substrate (100); a pixel electrode layer (200) and a common electrode layer (300) located on the substrate (100); and a plurality of common signal lines (400) located on the substrate (100), wherein the common signal lines (400) are insulated from the pixel electrode layer (200) and electrically connected to the common electrode layer (300), and an orthographic projection of the common signal lines (400) on the substrate (100) and an orthographic projection of the pixel electrode layer (200) on the substrate (100) have an overlapping area. The common signal lines (400) are provided with a plurality of electrode structures (400a), wherein different electrode structures (400a) are located in different sub-pixel areas (00a), and the plurality of electrode structures (400a) comprise: a connection electrode (401) connected with the common electrode layer (300), and an auxiliary electrode (402) not connected with the common electrode layer (300). The connection electrode (401) and the auxiliary electrode (402) are both provided in the common signal lines (400), and thus the sizes of storage capacitors (Cst) in the sub-pixel areas (00a) where the connection electrode (401) and the auxiliary electrode (402) are located are approximately the same, thereby reducing the probability of bad phenomena such as picture flicker and jitter of the picture displayed by the display apparatus.

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