Power over data lines system with combined dc coupling and common mode termination circuitry

    公开(公告)号:US11290291B2

    公开(公告)日:2022-03-29

    申请号:US16406889

    申请日:2019-05-08

    Abstract: In a Power over Data Lines (PoDL) system that conducts differential data and DC power over the same wire pair, various DC coupling techniques are described that improve DC voltage coupling while attenuating AC common mode noise and avoiding mode conversion. A first CMC and AC coupling capacitors are connected in series between a PHY and a twisted wire pair. A DC power supply is DC coupled to the wires via a series connection of a DMC and either matched inductors or a second CMC. Coupled between the DMC and the inductors/CMC is an RC termination circuit comprising a first capacitor coupled to one leg and a matched second capacitor coupled to the other leg. The two capacitors are connected to the same resistor coupled to ground.

    AMPLIFIERS FOR RF ADCS
    142.
    发明申请

    公开(公告)号:US20220094317A1

    公开(公告)日:2022-03-24

    申请号:US17031426

    申请日:2020-09-24

    Abstract: High-performance radio frequency analog-to-digital converters (RF ADCs) demand high bandwidth, high linearity, and low noise input amplifiers. A Class-AB amplifier, including common-gate transistor devices and common-source transistor devices operating in parallel, offers high bandwidth and high linearity, while offering lower power operation when compared to Class-A amplifiers. The Class-AB amplifier can be followed by a Class-AB unity gain buffer comprising common-source transistor devices to provide additional isolation for the RF ADC from the circuitry preceding the Class-AB amplifier.

    AUTONOMOUS BATTERY MONITORING SYSTEM

    公开(公告)号:US20220082627A1

    公开(公告)日:2022-03-17

    申请号:US17474703

    申请日:2021-09-14

    Abstract: Described herein is a device for autonomously monitoring a battery is provided. The device is integrated with the battery (e.g., by being electrically coupled to the battery). The device obtains measurement data by injecting electrical signals into the battery and measuring an electrical response of the battery. The device participates in an authentication protocol with a computing device to verify a unique identity of the device to the computing device. After performing the authentication protocol verifying the unique identity of the device, the device transmits battery data to the computer. Further, techniques for verifying the identity of the battery using measurement data obtained by the device are described herein. The techniques generate a battery signature using the measurement data that is then used to verify the identity of the battery. For example, the battery signature may be used to determine whether the battery is counterfeit or defective.

    Current-to-voltage signal converter
    144.
    发明授权

    公开(公告)号:US11277101B2

    公开(公告)日:2022-03-15

    申请号:US16811602

    申请日:2020-03-06

    Abstract: The present disclosure provides a current-to-voltage signal converter which may operate at an adjusted voltage. The current-to-voltage converter includes a trans-impedance amplifier which converts a current input into a voltage output. The voltage output may operate around an undesirable predetermined voltage, and must therefore be adjusted in order to make it suitable for any downstream signal processing circuitry, such as an ADC. As such, a subtractor circuit is coupled to the output of the trans-impedance amplifier. At the input of the subtractor circuit, a voltage adjustment circuit is employed, to adjust the voltage input to the subtractor circuit. As such, the input to the subtractor is adjusted between a first predetermined voltage threshold and a second predetermined voltage threshold, and the subtractor circuit may therefore be a low-voltage component.

    Noise cancellation in impedance measurement circuits

    公开(公告)号:US11272854B1

    公开(公告)日:2022-03-15

    申请号:US17010185

    申请日:2020-09-02

    Abstract: The present disclosure provides an impedance measurement circuit for measuring and detecting variations in an impedance under test, and methods of operating the impedance measurement circuit. The impedance measurement circuit comprises a plurality of converts, including at least two digital-to-analog converters (DACs). The DACs together alternate between a first mode of operation and a second mode of operation. In the first mode, a first one of the DACs is operational to convert a first digital input signal to a first analog output using a first hardware component, and a second one of the DACs is operational to convert a second digital input signal to a second analog output using a second hardware component. In the second mode, the first one of the DACs is operational to convert the first digital input signal to the first analog output using the second hardware component, and the second one of the DACs is operational to convert the second digital input signal to the second analog output using the first hardware component. By alternating between the first and second modes, the first and the second hardware components are alternately used in the first DAC and the second DAC to perform the respective DAC's conversion operations. Each hardware component may be associated with an intrinsic noise power that causes magnitude errors in the respective DAC's output. Furthermore, the DACs may be arranged such that magnitude errors in the first DAC and magnitude errors in the second DAC cause opposing errors in the impedance measurement made by the impedance measurement circuit. Therefore, by alternating between the first and the second modes, errors in the impedance measurements performed by the impedance measurement circuit are stabilised, or ratiometrically cancelled, over time.

    Bias arrangements with linearization transistors sensing RF signals and providing bias signals at different terminals

    公开(公告)号:US11265027B1

    公开(公告)日:2022-03-01

    申请号:US17065084

    申请日:2020-10-07

    Abstract: Bias arrangements for amplifiers are disclosed. An example arrangement includes a bias circuit, configured to produce a bias signal for the amplifier, and a linearization circuit, configured to improve linearity of the amplifier by modifying the bias signal based on an RF signal indicative of an RF input signal to be amplified by the amplifier. The linearization circuit includes a bias signal input for receiving the bias signal, an RF signal input for receiving the RF signal, and an output for providing a modified bias signal. The linearization circuit further includes at least a first linearization transistor, having a first terminal, a second terminal, and a third terminal, where each of the bias signal input and the RF signal input of the linearization circuit is coupled to the first terminal of the first linearization transistor, and the output of the linearization circuit is coupled to the third terminal of the first linearization transistor.

    Multi-I/O serial peripheral interface for precision converters

    公开(公告)号:US11256652B2

    公开(公告)日:2022-02-22

    申请号:US16879205

    申请日:2020-05-20

    Abstract: A Multi-I/O SPI for precision converters supports a Dual/Quad/Octal SPI to support the speed requirements for digital transmission and also includes a special mode that can be enabled by hardware and/or software to remove the bit scrambling requirement dictated by the JEDEC standard. The special mode removes the scramble requirement and associates each of the bidirectional data lines to a specific channel. The special mode provides backward compatibility that permits the precision converter to be used with controllers that do not natively support the JEDEC standard. Also, the Multi-I/O SPI includes registers divided into a primary region that is accessed only in default mode at power-up for write and/or read operations, and a secondary region that is accessed by any mode enabled in the control register. By restricting access to the “control” register area to a pre-defined mode in the converter at power-up, the access mode can be controlled.

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