Display with Silicon Gate Drivers and Semiconducting Oxide Pixels

    公开(公告)号:US20240127758A1

    公开(公告)日:2024-04-18

    申请号:US18322406

    申请日:2023-05-23

    Applicant: Apple Inc.

    Abstract: A display may include an array of pixels that receive control signals from a chain of gate drivers. The pixels can be formed using semiconducting oxide transistors, whereas the gate drivers can be formed using silicon transistor. Each gate driver may include a shift register subcircuit and an output buffer subcircuit. The shift register subcircuit may include a first set of transistors at least partially controlled by one or more shift register clock signals. The output buffer subcircuit may include a second set of transistors at least partially controlled by one or more output buffer clock signals. The output buffer clock signals can toggle independently from the shift register clock signals. Operated in this way, the shift register clock signals can have pulse widths optimized for stability while the output buffer clock signals can have pulse widths optimized for speed.

    Electronic Display with Hybrid In-Pixel and External Compensation

    公开(公告)号:US20230237965A1

    公开(公告)日:2023-07-27

    申请号:US18192905

    申请日:2023-03-30

    Applicant: Apple Inc.

    Abstract: A display pixel is provided that is operable to support hybrid compensation scheme having both in-pixel threshold voltage canceling and external threshold voltage compensation. The display may include multiple p-type silicon transistors with at least one n-type semiconducting-oxide transistor and one storage capacitor. An on-bias stress phase may be performed prior to a threshold voltage sampling and data programming phase to mitigate hysteresis and improve first frame response. In low refresh rate displays, a first additional on-bias stress operation can be performed separate from the threshold voltage sampling and data programming phase during a refresh frame and a second additional on-bias stress operation can be performed during a vertical blanking frame. The display pixel may be configured to receive an initialization voltage and an anode reset voltage, either of which can be dynamically tuned to match the stress of the first and second additional on-bias stress operations to minimize flicker.

    Electronic Devices with Displays for Mitigating Cathode Noise

    公开(公告)号:US20230081342A1

    公开(公告)日:2023-03-16

    申请号:US17859835

    申请日:2022-07-07

    Applicant: Apple Inc.

    Abstract: A display may include an array of pixels. Each pixel in the array may include a drive transistor, emission transistors, a data loading transistor, a gate voltage setting transistor, an initialization transistor, an anode reset transistor, a storage capacitor, and an optional current boosting capacitor coupled in series with an isolation transistor. A data refresh may include a initialization phase, a threshold voltage sampling phase, and a data programming phase. The threshold voltage sampling phase can be substantially longer than the data programming phase to decrease a current sampling level during the threshold voltage sampling phase, which helps reduce the display luminance sensitivity to temperature variations. During a data refresh, the isolation transistor can be turned on to provide current boosting. During emission periods, the isolation transistor is turned off to prevent cathode noise from potentially coupling through to one or more direct-current voltage nodes in the pixel.

    Displays with Reduced Temperature Luminance Sensitivity

    公开(公告)号:US20230042963A1

    公开(公告)日:2023-02-09

    申请号:US17970842

    申请日:2022-10-21

    Applicant: Apple Inc.

    Abstract: A display may include an array of pixels. Each pixel in the array may include a drive transistor, emission transistors, a data loading transistor, a gate voltage setting transistor, an initialization transistor, an anode reset transistor, a storage capacitor, and an optional current boosting capacitor. A data refresh may include a initialization phase, a threshold voltage sampling phase, and a data programming phase. The threshold voltage sampling phase can be substantially longer than the data programming phase to decrease a current sampling level during the threshold voltage sampling phase, which helps reduce the display luminance sensitivity to temperature variations.

    Electronic Display with In-Pixel Compensation and Oxide Drive Transistors

    公开(公告)号:US20230035245A1

    公开(公告)日:2023-02-02

    申请号:US17962239

    申请日:2022-10-07

    Applicant: Apple Inc.

    Abstract: A display pixel may include an organic light-emitting diode, one or more emission transistors, a drive transistor, a gate setting transistor, a data loading transistor, and an initialization transistor. The drive transistor may be implemented as a semiconducting-oxide transistor to mitigate threshold voltage hysteresis to improve first frame response at high refresh rates, to reduce undesired luminance jumps at low refresh rates, and to reduce image sticking. The gate setting transistor may also be implemented as a semiconducting-oxide transistor to reduce leakage at the gate terminal of the drive transistor. The initialization transistor may also be implemented as a semiconducting-oxide transistor so that it can be controlled using a shared emission signal to reduce routing complexity. The remaining transistors in the pixel may be implemented as p-type silicon transistors. Display pixels configured in this way can support in-pixel threshold voltage compensation and on-bias stress phase to further mitigate the hysteresis.

    Displays with Reduced Temperature Luminance Sensitivity

    公开(公告)号:US20220180819A1

    公开(公告)日:2022-06-09

    申请号:US17501530

    申请日:2021-10-14

    Applicant: Apple Inc.

    Abstract: A display may include an array of pixels. Each pixel in the array includes an organic light-emitting diode coupled to a drive transistor, a data loading transistor, a first capacitor for storing data charge, and a second capacitor. During a data programming phase, the data loading transistor may be activated to load in a data value onto the first capacitor. After the data programming phase, the second capacitor may be configured to receive a lower voltage, which extends a threshold voltage sampling time for the pixel. Configured and operated in this way, the temperature luminance sensitivity of the display can be reduced.

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