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公开(公告)号:US20240127758A1
公开(公告)日:2024-04-18
申请号:US18322406
申请日:2023-05-23
Applicant: Apple Inc.
Inventor: Shinya Ono , Chin-Wei Lin , Chen-Ming Chen , Hassan Edrees
IPC: G09G3/3266
CPC classification number: G09G3/3266 , G09G2300/0819 , G09G2300/0842 , G09G2300/0861 , G09G2310/0286 , G09G2310/0291 , G09G2310/08 , G09G2320/0247
Abstract: A display may include an array of pixels that receive control signals from a chain of gate drivers. The pixels can be formed using semiconducting oxide transistors, whereas the gate drivers can be formed using silicon transistor. Each gate driver may include a shift register subcircuit and an output buffer subcircuit. The shift register subcircuit may include a first set of transistors at least partially controlled by one or more shift register clock signals. The output buffer subcircuit may include a second set of transistors at least partially controlled by one or more output buffer clock signals. The output buffer clock signals can toggle independently from the shift register clock signals. Operated in this way, the shift register clock signals can have pulse widths optimized for stability while the output buffer clock signals can have pulse widths optimized for speed.
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公开(公告)号:US20240127754A1
公开(公告)日:2024-04-18
申请号:US18532835
申请日:2023-12-07
Applicant: Apple Inc.
Inventor: Chin-Wei Lin , Hung Sheng Lin , Shih Chang Chang , Shinya Ono
IPC: G09G3/3233 , G09G3/3266 , G09G3/3275 , H01L27/12 , H01L29/786
CPC classification number: G09G3/3233 , G09G3/3266 , G09G3/3275 , H01L27/1225 , H01L29/78651 , H01L29/7869 , G09G2300/0842 , G09G2300/0861 , G09G2310/0202 , G09G2320/0295 , G09G2320/043
Abstract: A display may have an array of pixels each of which has a light-emitting diode such as an organic light-emitting diode. A drive transistor and an emission transistor may be coupled in series with the light-emitting diode of each pixel between a positive power supply and a ground power supply. The pixels may include first and second switching transistors. A data storage capacitor may be coupled between a gate and source of the drive transistor in each pixel. Signal lines may be provided in columns of pixels to route signals such as data signals, sensed drive currents from the drive transistors, and predetermined voltages between display driver circuitry and the pixels. The switching transistors, emission transistors, and drive transistors may include semiconducting-oxide transistors and silicon transistors and may be n-channel transistors or p-channel transistors.
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公开(公告)号:US11823621B2
公开(公告)日:2023-11-21
申请号:US17576619
申请日:2022-01-14
Applicant: Apple Inc.
Inventor: Chin-Wei Lin , Shyuan Yang , Chuang Qian , Abbas Jamshidi Roudbari , Ting-Kuo Chang
IPC: G09G3/32 , G09G3/3225 , G09G3/3233
CPC classification number: G09G3/3225 , G09G3/3233 , G09G2300/043 , G09G2300/0417 , G09G2300/0819 , G09G2300/0861 , G09G2310/0262 , G09G2310/0297 , G09G2310/06 , G09G2310/061 , G09G2320/0214 , G09G2320/0242 , G09G2320/0247 , G09G2320/0252 , G09G2320/043 , G09G2320/045 , G09G2320/064 , G09G2340/0435
Abstract: A display may have an array of organic light-emitting diode display pixels operating at a low refresh rate. Each display pixel may have six thin-film transistors and one capacitor. One of the six transistors may serve as the drive transistor and may be compensated using the remaining five transistors and the capacitor. One or more on-bias stress operations may be applied before threshold voltage sampling to mitigate first frame dimming. Multiple anode reset and on-bias stress operations may be inserted during vertical blanking periods to reduce flicker and maintain balance and may also be inserted between successive data refreshes to improve first frame performance. Two different emission signals controlling each pixel may be toggled together using a pulse width modulation scheme to help provide darker black levels.
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公开(公告)号:US20230237965A1
公开(公告)日:2023-07-27
申请号:US18192905
申请日:2023-03-30
Applicant: Apple Inc.
Inventor: Chin-Wei Lin , Shinya Ono , Zino Lee , Yun Wang , Fan Gui
IPC: G09G3/3258 , H01L29/786 , H10K59/121
CPC classification number: G09G3/3258 , H01L29/7869 , H10K59/1213 , G09G2300/0842 , G09G2320/0233 , G09G2320/043
Abstract: A display pixel is provided that is operable to support hybrid compensation scheme having both in-pixel threshold voltage canceling and external threshold voltage compensation. The display may include multiple p-type silicon transistors with at least one n-type semiconducting-oxide transistor and one storage capacitor. An on-bias stress phase may be performed prior to a threshold voltage sampling and data programming phase to mitigate hysteresis and improve first frame response. In low refresh rate displays, a first additional on-bias stress operation can be performed separate from the threshold voltage sampling and data programming phase during a refresh frame and a second additional on-bias stress operation can be performed during a vertical blanking frame. The display pixel may be configured to receive an initialization voltage and an anode reset voltage, either of which can be dynamically tuned to match the stress of the first and second additional on-bias stress operations to minimize flicker.
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公开(公告)号:US20230206848A1
公开(公告)日:2023-06-29
申请号:US18172049
申请日:2023-02-21
Applicant: Apple Inc.
Inventor: Chin-Wei Lin , Hung Sheng Lin , Shih Chang Chang , Shinya Ono
IPC: G09G3/3233 , H01L29/786 , G09G3/3266 , G09G3/3275 , H01L27/12
CPC classification number: G09G3/3233 , H01L29/78651 , H01L29/7869 , G09G3/3266 , G09G3/3275 , H01L27/1225 , G09G2300/0842 , G09G2300/0861 , G09G2320/0295 , G09G2310/0202 , G09G2320/043
Abstract: A display may have an array of pixels each of which has a light-emitting diode such as an organic light-emitting diode. A drive transistor and an emission transistor may be coupled in series with the light-emitting diode of each pixel between a positive power supply and a ground power supply. The pixels may include first and second switching transistors. A data storage capacitor may be coupled between a gate and source of the drive transistor in each pixel. Signal lines may be provided in columns of pixels to route signals such as data signals, sensed drive currents from the drive transistors, and predetermined voltages between display driver circuitry and the pixels. The switching transistors, emission transistors, and drive transistors may include semiconducting-oxide transistors and silicon transistors and may be n-channel transistors or p-channel transistors.
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公开(公告)号:US11665933B2
公开(公告)日:2023-05-30
申请号:US17724306
申请日:2022-04-19
Applicant: Apple Inc.
Inventor: Chin-Wei Lin , Stephen S. Poon , Warren S. Rieutort-Louis , Cheng-Ho Yu , ChoongHo Lee , Doh-Hyoung Lee , Ting-Kuo Chang , Tsung-Ting Tsai , Vasudha Gupta , Younggu Lee
IPC: H01L27/32 , G09G3/3233 , H01L51/52 , G09G3/00 , G09G3/3258 , G09G3/3291
CPC classification number: H01L27/3248 , G09G3/006 , G09G3/3233 , G09G3/3258 , G09G3/3291 , H01L27/3246 , H01L27/3276 , H01L27/3279 , H01L51/5228 , G09G2300/0426 , G09G2310/0297
Abstract: An organic light-emitting diode display may have thin-film transistor circuitry formed on a substrate. The display and substrate may have rounded corners. A pixel definition layer may be formed on the thin-film transistor circuitry. Openings in the pixel definition layer may be provided with emissive material overlapping respective anodes for organic light-emitting diodes. A cathode layer may cover the array of pixels. A ground power supply path may be used to distribute a ground voltage to the cathode layer. The ground power supply path may be formed from a metal layer that is shorted to the cathode layer using portions of a metal layer that forms anodes for the diodes, may be formed from a mesh shaped metal pattern, may have L-shaped path segments, may include laser-deposited metal on the cathode layer, and may have other structures that facilitate distribution of the ground power supply.
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公开(公告)号:US20230081342A1
公开(公告)日:2023-03-16
申请号:US17859835
申请日:2022-07-07
Applicant: Apple Inc.
Inventor: Chin-Wei Lin , Aida R Colon-Berrios , Fan Gui , Levent Erdal Aygun , Mohammad Reza Esmaeili Rad , Ran Tu , Xin Lin , Yun Wang
IPC: G09G3/3233 , H01L27/32
Abstract: A display may include an array of pixels. Each pixel in the array may include a drive transistor, emission transistors, a data loading transistor, a gate voltage setting transistor, an initialization transistor, an anode reset transistor, a storage capacitor, and an optional current boosting capacitor coupled in series with an isolation transistor. A data refresh may include a initialization phase, a threshold voltage sampling phase, and a data programming phase. The threshold voltage sampling phase can be substantially longer than the data programming phase to decrease a current sampling level during the threshold voltage sampling phase, which helps reduce the display luminance sensitivity to temperature variations. During a data refresh, the isolation transistor can be turned on to provide current boosting. During emission periods, the isolation transistor is turned off to prevent cathode noise from potentially coupling through to one or more direct-current voltage nodes in the pixel.
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公开(公告)号:US20230042963A1
公开(公告)日:2023-02-09
申请号:US17970842
申请日:2022-10-21
Applicant: Apple Inc.
Inventor: Chin-Wei Lin , Shinya Ono , Zino Lee
IPC: G09G3/3266
Abstract: A display may include an array of pixels. Each pixel in the array may include a drive transistor, emission transistors, a data loading transistor, a gate voltage setting transistor, an initialization transistor, an anode reset transistor, a storage capacitor, and an optional current boosting capacitor. A data refresh may include a initialization phase, a threshold voltage sampling phase, and a data programming phase. The threshold voltage sampling phase can be substantially longer than the data programming phase to decrease a current sampling level during the threshold voltage sampling phase, which helps reduce the display luminance sensitivity to temperature variations.
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公开(公告)号:US20230035245A1
公开(公告)日:2023-02-02
申请号:US17962239
申请日:2022-10-07
Applicant: Apple Inc.
Inventor: Chin-Wei Lin , Shinya Ono , Jung Yen Huang
IPC: G09G3/3266 , G09G3/20 , G09G3/3291
Abstract: A display pixel may include an organic light-emitting diode, one or more emission transistors, a drive transistor, a gate setting transistor, a data loading transistor, and an initialization transistor. The drive transistor may be implemented as a semiconducting-oxide transistor to mitigate threshold voltage hysteresis to improve first frame response at high refresh rates, to reduce undesired luminance jumps at low refresh rates, and to reduce image sticking. The gate setting transistor may also be implemented as a semiconducting-oxide transistor to reduce leakage at the gate terminal of the drive transistor. The initialization transistor may also be implemented as a semiconducting-oxide transistor so that it can be controlled using a shared emission signal to reduce routing complexity. The remaining transistors in the pixel may be implemented as p-type silicon transistors. Display pixels configured in this way can support in-pixel threshold voltage compensation and on-bias stress phase to further mitigate the hysteresis.
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公开(公告)号:US20220180819A1
公开(公告)日:2022-06-09
申请号:US17501530
申请日:2021-10-14
Applicant: Apple Inc.
Inventor: Shinya Ono , Chin-Wei Lin , Zino Lee , Chun-Chieh Lin , Chen-Ming Chen
IPC: G09G3/3291 , G09G3/3266
Abstract: A display may include an array of pixels. Each pixel in the array includes an organic light-emitting diode coupled to a drive transistor, a data loading transistor, a first capacitor for storing data charge, and a second capacitor. During a data programming phase, the data loading transistor may be activated to load in a data value onto the first capacitor. After the data programming phase, the second capacitor may be configured to receive a lower voltage, which extends a threshold voltage sampling time for the pixel. Configured and operated in this way, the temperature luminance sensitivity of the display can be reduced.
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