公开(公告)号：US11532715B2

公开(公告)日：2022-12-20

申请号：US17397596

申请日：2021-08-09

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Ching-Wei Tsai ,  Yi-Bo Liao ,  Cheng-Ting Chung ,  Yu-Xuan Huang ,  Kuan-Lun Cheng

IPC分类号： H01L29/417 ,  H01L29/45 ,  H01L29/40 ,  H01L29/66 ,  H01L29/78 ,  H01L29/423

摘要： A semiconductor device includes a first source/drain region and a second source/drain region disposed on opposite sides of a plurality of conductive layers. A dielectric layer overlies the first source/drain region, the second source/drain region, and the plurality of conductive layers. An electrical contact extends through the dielectric layer and the first source/drain region, where a first surface of the electrical contact is a surface of the electrical contact that is closest to the substrate, a first surface of the plurality of conductive layers is a surface of the plurality of conductive layers that is closest to the substrate, and the first surface of the electrical contact is closer to the substrate than the first surface of the plurality of conductive layers.

公开(公告)号：US20220367462A1

公开(公告)日：2022-11-17

申请号：US17872907

申请日：2022-07-25

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Kuo-Cheng Chiang ,  Shi Ning Ju ,  Kuan-Lun Cheng ,  Chih-Hao Wang

IPC分类号： H01L27/092 ,  H01L29/78 ,  H01L21/8234 ,  H01L29/66

摘要： The present disclosure provides a semiconductor structure that includes a substrate having a frontside and a backside; an active region extruded from the substrate and surrounded by an isolation feature; a gate stack formed on the front side of the substrate and disposed on the active region; a first and a second source/drain (S/D) feature formed on the active region and interposed by the gate stack; a frontside contact feature disposed on a top surface of the first S/D feature; a backside contact feature disposed on and electrically connected to a bottom surface of the second S/D feature; and a semiconductor layer disposed on a bottom surface of the first S/D feature with a first thickness and a bottom surface of the gate stack with a second thickness being greater than the first thickness.

公开(公告)号：US11502183B2

公开(公告)日：2022-11-15

申请号：US17107374

申请日：2020-11-30

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Chien Ning Yao ,  Bo-Feng Young ,  Sai-Hooi Yeong ,  Kuan-Lun Cheng ,  Chih-Hao Wang

IPC分类号： H01L29/49 ,  H01L29/06 ,  H01L29/423 ,  H01L29/786 ,  H01L21/02 ,  H01L21/28 ,  H01L21/764 ,  H01L29/66

摘要： A semiconductor structure includes a stack of semiconductor layers disposed over a substrate, a metal gate stack having a top portion disposed over the stack of semiconductor layers and a bottom portion interleaved with the stack of semiconductor layers, an inner spacer disposed on sidewalls of the bottom portion of the metal gate stack, an air gap enclosed in the inner spacer, and an epitaxial source/drain (S/D) feature disposed over the inner spacer and adjacent to the metal gate stack.

公开(公告)号：US20220359708A1

公开(公告)日：2022-11-10

申请号：US17874892

申请日：2022-07-27

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Chien-Ning Yao ,  Bo-Feng Young ,  Sai-Hooi Yeong ,  Kuan-Lun Cheng ,  Chih-Hao Wang

IPC分类号： H01L29/49 ,  H01L29/08 ,  H01L29/417 ,  H01L29/66 ,  H01L29/78 ,  H01L21/28

摘要： Fin-like field effect transistors (FinFETs) and methods of fabrication thereof are disclosed herein. The FinFETs disclosed herein have gate air spacers integrated into their gate structures. An exemplary transistor includes a fin and a gate structure disposed over the fin between a first epitaxial source/drain feature and a second epitaxial source/drain feature. The gate structure includes a gate electrode, a gate dielectric, and gate air spacers disposed between the gate dielectric and sidewalls of the gate electrode.

公开(公告)号：US20220336461A1

公开(公告)日：2022-10-20

申请号：US17859638

申请日：2022-07-07

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Cheng-Ting Chung ,  Ching-Wei Tsai ,  Kuan-Lun Cheng

IPC分类号： H01L27/092 ,  H01L29/10 ,  H01L29/06 ,  H01L29/423 ,  H01L29/08 ,  H01L21/8238 ,  H01L29/66 ,  H01L21/02 ,  H01L21/306

摘要： A semiconductor device according to the present disclosure includes a first plurality of gate-all-around (GAA) devices in a first device area and a second plurality of GAA devices in a second device area. Each of the first plurality of GAA devices includes a first vertical stack of channel members extending along a first direction, and a first gate structure over and around the first vertical stack of channel members. Each of the second plurality of GAA devices includes a second vertical stack of channel members extending along a second direction, and a second gate structure over and around the second vertical stack of channel members. Each of the first plurality of GAA devices includes a first channel length and each of the second plurality of GAA devices includes a second channel length smaller than the first channel length.

公开(公告)号：US11476166B2

公开(公告)日：2022-10-18

申请号：US16875726

申请日：2020-05-15

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Bo-Feng Young ,  Sai-Hooi Yeong ,  Kuan-Lun Cheng ,  Chih-Hao Wang

IPC分类号： H01L29/66 ,  H01L29/423 ,  H01L21/8238 ,  H01L29/06 ,  H01L27/092 ,  H01L29/786 ,  H01L21/02

摘要： A semiconductor device is provided. The device includes a first pair and a second pair of source/drain features over a semiconductor substrate. The first pair of source/drain features are p-type doped. The second pair of source/drain features are n-type doped. A first stack of semiconductor layers connect the first pair of source/drain features along a first direction. A second stack of semiconductor layers connect the second pair of source/drain features along a second direction. A first gate is between vertically adjacent layers of the first stack of semiconductor layers. The first gate has a first portion that has a first dimension along the first direction. A second gate is between vertically adjacent layers of the second stack of semiconductor layers. The second gate has a second portion that has a second dimension along the second direction. The second dimension is larger than the first dimension.

公开(公告)号：US20220310841A1

公开(公告)日：2022-09-29

申请号：US17838941

申请日：2022-06-13

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Shi Ning Ju ,  Kuo-Cheng Chiang ,  Chih-Hao Wang ,  Kuan-Lun Cheng

IPC分类号： H01L29/78 ,  H01L23/522 ,  H01L23/528 ,  H01L21/8234 ,  H01L27/092 ,  H01L29/66 ,  H01L21/768 ,  H01L29/417 ,  H01L27/088

摘要： A semiconductor structure includes a power rail on a back side of the semiconductor structure, a first interconnect structure on a front side of the semiconductor structure, and a source feature, a drain feature, a first semiconductor fin, and a gate structure that are between the power rail and the first interconnect structure. The first semiconductor fin connects the source feature and the drain feature. The gate structure is disposed on a front surface and two side surfaces of the first semiconductor fin. The semiconductor structure further includes an isolation structure disposed between the power rail and the drain feature and between the power rail and the first semiconductor fin and a via penetrating through the isolation structure and connecting the source feature to the power rail.

公开(公告)号：US11450662B2

公开(公告)日：2022-09-20

申请号：US16952812

申请日：2020-11-19

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Jia-Chuan You ,  Chia-Hao Chang ,  Kuo-Cheng Chiang ,  Kuan-Lun Cheng ,  Chih-Hao Wang

IPC分类号： H01L27/088 ,  H01L29/786 ,  H01L21/8234 ,  H01L29/423

摘要： A semiconductor device according to the present disclosure includes a first gate structure and a second gate structure aligned along a direction, a first metal layer disposed over the first gate structure, a second metal layer disposed over the second gate structure, and a gate isolation structure extending between the first gate structure and the second gate structure as well as between the first metal layer and the second metal layer.

公开(公告)号：US20220293521A1

公开(公告)日：2022-09-15

申请号：US17682884

申请日：2022-02-28

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Lin-Yu Huang ,  Li-Zhen Yu ,  Chia-Hao Chang ,  Cheng-Chi Chuang ,  Kuan-Lun Cheng ,  Chih-Hao Wang

IPC分类号： H01L23/528 ,  H01L21/768 ,  H01L23/522 ,  H01L21/3213

摘要： Semiconductor devices and methods of forming the same are provided. In one embodiment, a semiconductor device includes an active region including a channel region and a source/drain region and extending along a first direction, and a source/drain contact structure over the source/drain region. The source/drain contact structure includes a base portion extending lengthwise along a second direction perpendicular to the first direction, and a via portion over the base portion. The via portion tapers away from the base portion.

公开(公告)号：US20220216326A1

公开(公告)日：2022-07-07

申请号：US17705508

申请日：2022-03-28

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Sai-Hooi Yeong ,  Chi-On Chui ,  Kai-Hsuan Lee ,  Kuan-Lun Cheng ,  Chih-Hao Wang

IPC分类号： H01L29/66 ,  H01L21/8234 ,  H01L29/78

摘要： A semiconductor device includes a semiconductor substrate, an isolation feature over the semiconductor substrate, a fin protruding from the semiconductor substrate and through the isolation feature, a gate stack over and engaging the fin, and a gate spacer on sidewalls of the gate stack. A bottom portion of the sidewalls of the gate stack tilts inwardly towards the gate stack.