-
公开(公告)号：US10679851B2
公开(公告)日：2020-06-09
申请号：US16214172
申请日：2018-12-10
Inventor： Peng He , Hongping Yu
IPC: H01L21/84 , H01L21/02 , H01L21/285 , H01L21/311 , H01L29/66 , H01L29/786
Abstract: The present disclosure provides a poly-silicon thin film and a preparation method of a thin film transistor, the method including: providing a substrate, and forming an amorphous silicon thin film on the substrate; placing the amorphous silicon thin film in air for oxidization so as to form an oxide film on the amorphous silicon thin film; etching the oxide film with hydrofluoric acid, and reserving part of the oxide film after etching; and carrying out excimer laser treatment on the amorphous silicon thin film to form a poly-silicon thin film.
-
公开(公告)号：US20200035490A1
公开(公告)日：2020-01-30
申请号：US16214172
申请日：2018-12-10
Inventor： Peng He , Hongping Yu
IPC: H01L21/02 , H01L21/311 , H01L29/66 , H01L29/786 , H01L21/285
Abstract: The present disclosure provides a poly-silicon thin film and a preparation method of a thin film transistor, the method including: providing a substrate, and forming an amorphous silicon thin film on the substrate; placing the amorphous silicon thin film in air for oxidization so as to form an oxide film on the amorphous silicon thin film; etching the oxide film with hydrofluoric acid, and reserving part of the oxide film after etching; and carrying out excimer laser treatment on the amorphous silicon thin film to form a poly-silicon thin film.
-
Patent Agency Ranking
公开(公告)号：US11114468B2
公开(公告)日：2021-09-07
申请号：US16475137
申请日：2019-03-25
Inventor： Xin Zhang , Lisheng Li , Peng He
IPC: H01L27/12 , H01L29/423
Abstract: A thin film transistor (TFT) array substrate is provided. The TFT array substrate includes a display device plate and a semiconductor layer disposed on the display device plate. A thickness of the semiconductor layer is less than or equal to 35 nm.
-
公开(公告)号：US11018165B2
公开(公告)日：2021-05-25
申请号：US16641663
申请日：2019-11-06
Abstract: A manufacturing method of an array substrate and the array substrate are provided. The method comprises: forming an active layer on a substrate; forming an insulation layer on the active layer; forming a first metal layer on the insulation layer; forming an interlayer dielectric layer and a pixel electrode layer on the first metal layer by a same mask; forming a second metal layer on the interlayer dielectric layer, wherein the second metal layer comprises a source electrode, a drain electrode, and a touch signal line; and forming a patterned protective layer and a patterned common electrode layer on the second metal layer.
-
公开(公告)号：US20190326335A1
公开(公告)日：2019-10-24
申请号：US16097279
申请日：2018-09-18
Inventor： Guanghui Liu , Peng He , Yong Xu , Fei Ai
IPC: H01L27/12
Abstract: A manufacturing method for TFT array substrate and TFT array substrate are disclosed. After depositing an electrode material layer and a metal material layer on the gate insulation layer and the active layer in sequence after the active layer above the gate electrode is formed. A photoresist pattern is formed on the metal material layer. The photoresist pattern includes a first and second photoresist blocks with different thicknesses. The metal material layer and the electrode material layer are etched using the photoresist pattern to form a contact electrode and pixel electrodes connected with two ends of the active layer and the source/drain electrodes on the contact electrode. The process is simple and can effectively reduce the contact resistance between the source/drain and the active layer and improve the quality of the product.
-
6.发明授权公开(公告)号：US11101387B2
公开(公告)日：2021-08-24
申请号：US16344018
申请日：2018-11-19
Inventor： Lisheng Li , Peng He , Yuan Yan
IPC: H01L29/78 , H01L29/786 , H01L21/02 , H01L29/10 , H01L29/66
Abstract: A low temperature polysilicon layer, a thin film transistor, and a method for manufacturing same are provided. The low temperature polysilicon layer includes a substrate, at least one buffer layer, and a polysilicon layer. The polysilicon layer is disposed on the at least one buffer layer. The polysilicon layer includes a channel region, two low doped regions disposed on two sides of the channel region, and two high doped regions disposed on an outer side of the low doped regions. Thicknesses of an edge of the channel region and at least one portion of the low doped regions are less than a thickness of another position of the polysilicon layer.
-
公开(公告)号：US10971530B2
公开(公告)日：2021-04-06
申请号：US16097279
申请日：2018-09-18
Inventor： Guanghui Liu , Peng He , Yong Xu , Fei Ai
IPC: H01L27/12
Abstract: A manufacturing method for TFT array substrate and TFT array substrate are disclosed. After depositing an electrode material layer and a metal material layer on the gate insulation layer and the active layer in sequence after the active layer above the gate electrode is formed. A photoresist pattern is formed on the metal material layer. The photoresist pattern includes a first and second photoresist blocks with different thicknesses. The metal material layer and the electrode material layer are etched using the photoresist pattern to form a contact electrode and pixel electrodes connected with two ends of the active layer and the source/drain electrodes on the contact electrode. The process is simple and can effectively reduce the contact resistance between the source/drain and the active layer and improve the quality of the product.
-
-
-
-
-
-
Search Results
7
records
(took 0.035 seconds)
