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公开(公告)号:US12183753B2
公开(公告)日:2024-12-31
申请号:US17483962
申请日:2021-09-24
Inventor: Wei-Lin Chen , Ching-Chung Su , Chun-Hao Chou , Kuo-Cheng Lee
IPC: H01L27/146 , G02F1/19
Abstract: An image sensor includes a first photodiode and a second photodiode. The image sensor further includes a first color filter over the first photodiode; and a second color filter over the second photodiode. The image sensor further includes a first microlens over the first color filter and a second microlens over the second color filter. The image sensor further includes a first electro-optical (EO) film between the first color filter and the first microlens, wherein a material of the first EO film is configured to change refractive index in response to application of an electrical field. The image sensor further includes a second EO film between the second color filter and the second microlens, wherein a material of the second EO film is configured to change refractive index in response to application of an electrical field.
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公开(公告)号:US12183751B2
公开(公告)日:2024-12-31
申请号:US17448542
申请日:2021-09-23
Inventor: Wei-Lin Chen , Chun-Hao Chou , Kuo-Cheng Lee
IPC: H01L27/146
Abstract: Implementations described herein reduce electron-hole pair generation due to silicon dangling bonds in pixel sensors. In some implementations, the silicon dangling bonds in a pixel sensor may be passivated by silicon-fluorine (Si—F) bonding in various portions of the pixel sensor such as a transfer gate contact via or a shallow trench isolation region, among other examples. The silicon-fluorine bonds are formed by fluorine implantation and/or another type of semiconductor processing operation. In some implementations, the silicon-fluorine bonds are formed as part of a cleaning operation using fluorine (F) such that the fluorine may bond with the silicon of the pixel sensor. Additionally, or alternatively, the silicon-fluorine bonds are formed as part of a doping operation in which boron (B) and/or another p-type doping element is used with fluorine such that the fluorine may bond with the silicon of the pixel sensor.
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公开(公告)号:US11990488B2
公开(公告)日:2024-05-21
申请号:US17249787
申请日:2021-03-12
Inventor: Wei-Lin Chen , Ching-Chung Su , Chun-Hao Chou , Kuo-Cheng Lee
IPC: H01L27/146 , H04N25/77
CPC classification number: H01L27/14621 , H01L27/14609 , H01L27/1463 , H04N25/77 , H01L27/14627
Abstract: A grid structure in a pixel array may be at least partially angled or tapered toward a top surface of the grid structure such that the width of the grid structure approaches a near-zero width near the top surface of the grid structure. This permits the spacing between color filter regions in between the grid structure to approach a near-zero spacing near the top surfaces of the color filter regions. The tight spacing of color filter regions provided by the angled or tapered grid structure provides a greater surface area and volume for incident light collection in the color filter regions. Moreover, the width of the grid structure may increase at least partially toward a bottom surface of the grid structure such that the wider dimension of the grid structure near the bottom surface of the grid structure provides optical crosstalk protection for the pixel sensors in the pixel array.
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公开(公告)号:US12218160B2
公开(公告)日:2025-02-04
申请号:US17249788
申请日:2021-03-12
Inventor: Wei-Lin Chen , Ching-Chung Su , Chun-Hao Chou , Kuo-Cheng Lee
IPC: H01L27/146
Abstract: A pixel sensor may include a layer stack to reduce and/or block the effects of plasma and etching on a photodiode and/or other lower-level layers. The layer stack may include a first oxide layer, a layer having a band gap that is approximately less than 8.8 electron-Volts (eV), and a second oxide layer. The layer stack may reduce and/or prevent the penetration and absorption of ultraviolet photons resulting from the plasma and etching processes, which may otherwise cause the formation of electron-hole pairs in the substrate in which the photodiode is included.
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公开(公告)号:US12113042B2
公开(公告)日:2024-10-08
申请号:US17450104
申请日:2021-10-06
Inventor: Chun-Liang Lu , Wei-Lin Chen , Chun-Hao Chou , Kuo-Cheng Lee
IPC: H01L23/00
CPC classification number: H01L24/73 , H01L24/11 , H01L24/17 , H01L2224/11466 , H01L2224/11845 , H01L2224/1703 , H01L2224/73104 , H01L2224/9211
Abstract: Some implementations described herein provide a semiconductor structure. The semiconductor structure includes a first wafer including a first metal structure within a body of the first wafer. The semiconductor structure also includes a second wafer including a second metal structure within a body of the second wafer, where the first wafer is coupled to the second wafer at an interface. The semiconductor structure further includes a metal bonding structure coupled to the first metal structure and the second metal structure and extending through the interface.
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