公开(公告)号：US20170200800A1

公开(公告)日：2017-07-13

申请号：US14990009

申请日：2016-01-07

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Hsiao-Ping LIU ,  Hung-Chang HSU ,  Hung-Wen SU ,  Ming-Hsing TSAI ,  Rueijer LIN ,  Sheng-Hsuan LIN ,  Ya-Lien LEE ,  Yen-Shou KAO

IPC: H01L29/45 ,  H01L21/311 ,  H01L29/51 ,  H01L21/768

CPC classification number: H01L29/456 ,  H01L21/31111 ,  H01L21/31116 ,  H01L21/31144 ,  H01L21/76804 ,  H01L21/76832 ,  H01L21/76846 ,  H01L21/76856 ,  H01L29/511 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/78

Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a gate stack, a spacer layer, and a dielectric layer over a substrate. The method includes removing a first portion of the dielectric layer to form a first hole in the dielectric layer. A second portion of the dielectric layer is under the first hole. The method includes forming a first protection layer over the gate stack and the spacer layer. The method includes forming a second protection layer over the first protection layer. The second protection layer includes a metal compound material, and the first protection layer and the second protection layer includes a same metal element. The method includes removing the second portion of the dielectric layer to form a through hole. The method includes forming a conductive contact structure in the through hole.

公开(公告)号：US20150108649A1

公开(公告)日：2015-04-23

申请号：US14587019

申请日：2014-12-31

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Kai-Shiang KUO ,  Ken-Yu CHANG ,  Ya-Lien LEE ,  Hung-Wen SU

IPC: H01L23/532 ,  H01L21/768

CPC classification number: H01L23/53238 ,  H01L21/2855 ,  H01L21/28562 ,  H01L21/768 ,  H01L21/76802 ,  H01L21/76843 ,  H01L21/76846 ,  H01L21/76867 ,  H01L21/76877 ,  H01L23/53223 ,  H01L23/53252 ,  H01L23/53266 ,  H01L2924/0002 ,  H01L2924/00

Abstract: In a method of fabricating a semiconductor device, an opening is formed inside a dielectric layer above a semiconductor substrate. The opening has a wall. At least one diffusion barrier material is then formed over the wall of the opening by at least two alternating steps, which are selected from the group consisting of a process of physical vapor deposition (PVD) and a process of atomic layer deposition (ALD). A liner layer is formed over the at least one diffusion barrier material.

Abstract translation: 在制造半导体器件的方法中，在半导体衬底之上的电介质层的内部形成有开口。 开口有一堵墙。 然后通过至少两个交替的步骤在开口的壁上形成至少一个扩散阻挡材料，所述至少两个交替步骤选自由物理气相沉积（PVD）和原子层沉积（ALD）的过程组成的组。 衬里层形成在至少一个扩散阻挡材料上。