公开(公告)号：US20210376103A1

公开(公告)日：2021-12-02

申请号：US16887577

申请日：2020-05-29

Applicant: Taiwan Semiconductor Manufacturing, Co., Ltd.

Inventor： Shuen-Shin LIANG ,  Chun-I TSAI ,  Chih-Wei CHANG ,  Chun-Hsien HUANG ,  Hung-Yi HUANG ,  Keng-Chu LIN ,  Ken-Yu CHANG ,  Sung-Li WANG ,  Chia-Hung CHU ,  Hsu-Kai CHANG

IPC: H01L29/45 ,  H01L23/535 ,  H01L21/768

Abstract: The present disclosure describes a method for forming liner-free or barrier-free conductive structures. The method includes forming a liner-free conductive structure on a cobalt conductive structure disposed on a substrate, depositing a cobalt layer on the liner-free conductive structure and exposing the liner-free conductive structure to a heat treatment. The method further includes removing the cobalt layer from the liner-free conductive structure.

公开(公告)号：US20230095976A1

公开(公告)日：2023-03-30

申请号：US18061676

申请日：2022-12-05

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Shuen-Shin LIANG ,  Chun-I TSAI ,  Chih-Wei CHANG ,  Chun-Hsien HUANG ,  Hung-Yi HUANG ,  Keng-Chu LIN ,  Ken-Yu CHANG ,  Sung-Li WANG ,  Chia-Hung CHU ,  Hsu-Kai CHANG

IPC: H01L23/532 ,  H01L21/768

Abstract: The present disclosure describes a method for forming capping layers configured to prevent the migration of out-diffused cobalt atoms into upper metallization layers In some embodiments, the method includes depositing a cobalt diffusion barrier layer on a liner-free conductive structure that includes ruthenium, where depositing the cobalt diffusion barrier layer includes forming the cobalt diffusion barrier layer self-aligned to the liner-free conductive structure. The method also includes depositing, on the cobalt diffusion barrier layer, a stack with an etch stop layer and dielectric layer, and forming an opening in the stack to expose the cobalt diffusion barrier layer. Finally, the method includes forming a conductive structure on the cobalt diffusion barrier layer.

公开(公告)号：US20210335720A1

公开(公告)日：2021-10-28

申请号：US17141445

申请日：2021-01-05

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Shuen-Shin LIANG ,  Chun-I TSAI ,  Chih-Wei CHANG ,  Chun-Hsien HUANG ,  Hung-Yi HUANG ,  Keng-Chu LIN ,  Ken-Yu CHANG ,  Sung-Li WANG ,  Chia-Hung CHU ,  Hsu-Kai CHANG

IPC: H01L23/532 ,  H01L21/768

Abstract: The present disclosure describes a method for forming capping layers configured to prevent the migration of out-diffused cobalt atoms into upper metallization layers In some embodiments, the method includes depositing a cobalt diffusion barrier layer on a liner-free conductive structure that includes ruthenium, where depositing the cobalt diffusion barrier layer includes forming the cobalt diffusion barrier layer self-aligned to the liner-free conductive structure. The method also includes depositing, on the cobalt diffusion barrier layer, a stack with an etch stop layer and dielectric layer, and forming an opening in the stack to expose the cobalt diffusion barrier layer. Finally, the method includes forming a conductive structure on the cobalt diffusion barrier layer.

公开(公告)号：US20250066899A1

公开(公告)日：2025-02-27

申请号：US18454702

申请日：2023-08-23

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chun-Yen LIAO ,  I. LEE ,  Shu-Lan CHANG ,  Sheng-Hsuan LIN ,  Feng-Yu CHANG ,  Wei-Jung LIN ,  Chun-I TSAI ,  Chih-Chien CHI ,  Ming-Hsing TSAI ,  Pei Shan CHANG ,  Chih-Wei CHANG

IPC: C23C14/04 ,  C23C14/34 ,  C23C14/50 ,  C23C14/54 ,  C23C14/58

Abstract: A method includes: positioning a wafer on an electrostatic chuck of a physical vapor deposition apparatus, the wafer including an opening exposing a conductive feature; setting a temperature of the wafer to a room temperature; forming a tungsten thin film in the opening by the physical vapor deposition apparatus, the tungsten thin film including a bottom portion that is on an upper surface of the conductive feature exposed by the opening, a top portion that is on an upper surface of a dielectric layer through which the opening extends and a sidewall portion that is on a sidewall of the dielectric layer exposed by the opening; removing the top portion and the sidewall portion of the tungsten thin film from over the opening; and forming a tungsten plug in the opening on the bottom portion by selectively depositing tungsten by a chemical vapor deposition operation.

公开(公告)号：US20190164823A1

公开(公告)日：2019-05-30

申请号：US15880448

申请日：2018-01-25

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yu Shih WANG ,  Chun-I TSAI ,  Shian Wei MAO ,  Ken-Yu CHANG ,  Ming-Hsing TSAI ,  Wei-Jung LIN

IPC: H01L21/768 ,  H01L23/532 ,  H01L21/3213

CPC classification number: H01L21/76847 ,  H01L21/32134 ,  H01L21/76846 ,  H01L23/485 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53252 ,  H01L23/53266

Abstract: Generally, the present disclosure provides example embodiments relating to conductive features, such as metal contacts, vias, lines, etc., and methods for forming those conductive features. In an embodiment, a barrier layer is formed along a sidewall. A portion of the barrier layer along the sidewall is etched back. After etching back the portion of the barrier layer, an upper portion of the barrier layer along the sidewall is smoothed. A conductive material is formed along the barrier layer and over the smoothed upper portion of the barrier layer.