公开(公告)号：US20240421012A1

公开(公告)日：2024-12-19

申请号：US18210134

申请日：2023-06-15

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sangsick PARK ,  Chungsun LEE ,  Hanmin LEE ,  Seungyoon JUNG

IPC: H01L23/24 ,  H01L23/00 ,  H01L25/065

Abstract: A semiconductor device includes a first semiconductor chip having a first through silicon via (TSV). A second semiconductor chip is arranged on the first semiconductor chip and includes a second TSV positioned on a same vertical line as the first TSV. A conductive pad is disposed on each of the first TSV and the second TSV. The conductive pad electrically connects the first semiconductor chip and the second semiconductor chip to each other. A warpage prevention metal structure is disposed on an upper surface of the first semiconductor chip or an upper surface of the second semiconductor chip.

公开(公告)号：US20240162193A1

公开(公告)日：2024-05-16

申请号：US18213852

申请日：2023-06-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seongyo KIM ,  UN-BYOUNG KANG ,  SANG-SICK PARK ,  Hanmin LEE ,  Seungyoon JUNG

IPC: H01L25/065 ,  B23K26/38 ,  B23K26/40 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31 ,  H01L23/48

CPC classification number: H01L25/0657 ,  B23K26/38 ,  B23K26/40 ,  H01L21/565 ,  H01L23/3128 ,  H01L23/481 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  B23K2101/40 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2225/06517 ,  H01L2225/06541

Abstract: Disclosed are semiconductor packages and their fabrication methods. The semiconductor package comprises a first semiconductor chip, a lower adhesion layer on the first semiconductor chip, a second semiconductor chip on the lower adhesion layer, an upper adhesion layer on the second semiconductor chip, and a third semiconductor chip on the upper adhesion layer. The lower adhesion layer includes a first cutting surface connected to a top surface of the lower adhesion layer. The upper adhesion layer is in contact with the first cutting surface of the lower adhesion layer.

公开(公告)号：US20230230946A1

公开(公告)日：2023-07-20

申请号：US17939127

申请日：2022-09-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seongyo KIM ,  UN-BYOUNG KANG ,  MINSOO KIM ,  SANG-SICK PARK ,  Seungyoon JUNG

IPC: H01L23/00 ,  H01L25/065

CPC classification number: H01L24/09 ,  H01L24/16 ,  H01L24/17 ,  H01L24/32 ,  H01L24/08 ,  H01L24/73 ,  H01L25/0652 ,  H01L25/0657 ,  H01L2224/81203 ,  H01L24/81 ,  H01L2924/3511 ,  H01L2924/182 ,  H01L2225/06513 ,  H01L2225/06524 ,  H01L2225/06527 ,  H01L2225/06544 ,  H01L2225/06589 ,  H01L2224/16145 ,  H01L2224/16227 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/1703 ,  H01L2224/17055 ,  H01L2224/17104 ,  H01L2224/17179 ,  H01L2224/17132 ,  H01L2224/16012 ,  H01L2224/16055 ,  H01L2224/16059 ,  H01L2224/16104 ,  H01L2224/0801 ,  H01L2224/08056 ,  H01L2224/08055 ,  H01L2224/0903 ,  H01L2224/09179 ,  H01L2224/09132 ,  H01L2224/73204

Abstract: A semiconductor package comprises a first die having a central region and a peripheral region that surrounds the central region; a plurality of through electrodes that penetrate the first die; a plurality of first pads at a top surface of the first die and coupled to the through electrodes; a second die on the first die; a plurality of second pads at a bottom surface of the second die, the bottom surface of the second die facing the top surface of the first die; a plurality of connection terminals that connect the first pads to the second pads; and a dielectric layer that fills a space between the first die and the second die and surrounds the connection terminals. A first width of each of the first pads in the central region may be greater than a second width of each of the first pads in the peripheral region. Each of the connection terminals may include a convex portion at a lateral surface thereof, which protrudes beyond a lateral surface of a respective first pad and a lateral surface of a respective second pad. The convex portion may protrude in a direction away from a center of the first die. Protruding distances of the convex portions may increase in a direction from the center of the first die toward an outside of the first die.