公开(公告)号：US20240127865A1

公开(公告)日：2024-04-18

申请号：US18217087

申请日：2023-06-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yeji Shin ,  TAE-HONG KWON ,  YOONJAE LEE ,  Seokin Hong

IPC: G11C5/14 ,  G11C16/12 ,  G11C16/30

CPC classification number: G11C5/145 ,  G11C16/12 ,  G11C16/30

Abstract: Disclosed is a charge pump of a flash memory, which includes a first stage pump that is connected between an output terminal and a first pump node, and a second stage pump that is connected between the first pump node and a second pump node. The first stage pump includes a first switch circuit that is connected between a power terminal and the first pump node and provides a power supply voltage to the first pump node in response to a first stage signal, in a normal operation, and a first pump circuit that generates a first pumping voltage by using a voltage of the first pump node in response to a first clock signal and provides the first pumping voltage to the output terminal. The first switch circuit blocks a current flow from the first pump node to the power terminal in a sudden power-off event.

公开(公告)号：US20180081557A1

公开(公告)日：2018-03-22

申请号：US15685084

申请日：2017-08-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Pavan Kumar KASIBHATLA ,  Hak-Soo YU ,  Seokin Hong

IPC: G06F3/06 ,  H04L12/28

CPC classification number: G06F3/0607 ,  G06F3/061 ,  G06F3/0619 ,  G06F3/0656 ,  G06F3/0659 ,  G06F3/0688 ,  H04L12/28 ,  H04L12/4625

Abstract: Disclosed is a computer system which includes a host and a memory module. The host transfers a plurality of cache lines to a memory module through a plurality of channels, the cache lines including a plurality of data elements and allocates cache lines with target data elements in the plurality of data elements to one channel of the plurality of channels. The target data elements are arranged within the ache lines according to a stride interval. The stride interval is a number of data elements between consecutive ones of the target data elements. The memory module includes gather-scatter engines that are respectively connected to the plurality of channels and scatter or gather the target data elements under control of the host.

公开(公告)号：US12272419B2

公开(公告)日：2025-04-08

申请号：US18217087

申请日：2023-06-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yeji Shin ,  Tae-Hong Kwon ,  Yoonjae Lee ,  Seokin Hong

IPC: G11C5/14 ,  G11C16/12 ,  G11C16/30

Abstract: Disclosed is a charge pump of a flash memory, which includes a first stage pump that is connected between an output terminal and a first pump node, and a second stage pump that is connected between the first pump node and a second pump node. The first stage pump includes a first switch circuit that is connected between a power terminal and the first pump node and provides a power supply voltage to the first pump node in response to a first stage signal, in a normal operation, and a first pump circuit that generates a first pumping voltage by using a voltage of the first pump node in response to a first clock signal and provides the first pumping voltage to the output terminal. The first switch circuit blocks a current flow from the first pump node to the power terminal in a sudden power-off event.