公开(公告)号：US11881482B2

公开(公告)日：2024-01-23

申请号：US17852040

申请日：2022-06-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Gihee Cho ,  Sanghyuck Ahn ,  Hyun-Suk Lee ,  Jungoo Kang ,  Jin-Su Lee ,  Hongsik Chae

IPC: H01L27/10 ,  H10B12/00 ,  G11C8/14 ,  H01L49/02

CPC classification number: H01L27/101 ,  G11C8/14 ,  H01L28/60

Abstract: A semiconductor device includes; a bottom electrode on a substrate, a supporting pattern between the bottom electrode and an adjacent bottom electrode, a top electrode covering the bottom electrode and the supporting pattern, and a dielectric layer between the bottom electrode and the top electrode and between the supporting pattern and the top electrode. The bottom electrode may include a first portion including a seam and a second portion on the first portion, a top end of the second portion may be disposed at a height lower than an upper surface of the supporting pattern, and a portion of a bottom end of the second portion may be exposed to the seam.

公开(公告)号：US11532696B2

公开(公告)日：2022-12-20

申请号：US16592842

申请日：2019-10-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： Gihee Cho ,  Jungoo Kang ,  Sangyeol Kang ,  Hyunsuk Lee

IPC: H01L49/02 ,  H01L27/108

Abstract: Semiconductor devices including a capacitor and methods of forming the same are provided. The semiconductor devices may include a capacitor that include a lower electrode, an upper electrode on the lower electrode, and a dielectric layer extending between the lower electrode and the upper electrode. The lower electrode may include a doped region that contacts the dielectric layer, and the doped region of the lower electrode is configured to increase a capacitance of the capacitor.

公开(公告)号：US20210066066A1

公开(公告)日：2021-03-04

申请号：US16853796

申请日：2020-04-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyun-Suk Lee ,  Jungoo Kang ,  Gihee Cho ,  Sanghyuck Ahn

IPC: H01L21/02 ,  H01L21/768 ,  H01L21/12 ,  H01L21/302

Abstract: Semiconductor devices are provided. A semiconductor device includes a first portion of a lower electrode structure on a substrate. The semiconductor device includes a first support pattern being in contact with a first portion of a sidewall of the first portion of the lower electrode structure. The semiconductor device includes a second portion of the lower electrode structure on a second portion of the sidewall of the first portion of the lower electrode structure. The semiconductor device includes an upper electrode on the second portion of the lower electrode structure and on the first support pattern. Moreover, the semiconductor device includes a dielectric layer between the upper electrode and the second portion of the lower electrode structure.

公开(公告)号：US20230413526A1

公开(公告)日：2023-12-21

申请号：US18332876

申请日：2023-06-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Donggeon Lee ,  Jungoo Kang ,  Dayeon Nam ,  Juwon Park ,  Sungjoon Yoon

IPC: H10B12/00

CPC classification number: H10B12/315 ,  H10B12/033

Abstract: A semiconductor device includes a lower structure, first electrodes spaced apart from each other on the lower structure, a second electrode on the first electrodes, and a dielectric layer between the first electrodes and the second electrode. Each of the first electrodes includes a first element, a second element, and nitrogen (N). A degree of stiffness of a first nitride material including the first element is higher than a degree of stiffness of a second nitride material including the second element. Each of the first electrodes includes a region in which a ratio of a concentration of the first element in the region to a concentration of the second element in the region decreases in a horizontal direction, away from a side surface of each of the first electrodes.

公开(公告)号：US20230084276A1

公开(公告)日：2023-03-16

申请号：US18057894

申请日：2022-11-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： GIHEE CHO ,  Jungoo Kang ,  Sangyeol Kang ,  Hyunsuk Lee

IPC: H01L49/02

Abstract: Semiconductor devices including a capacitor and methods of forming the same are provided. The semiconductor devices may include a capacitor that include a lower electrode, an upper electrode on the lower electrode, and a dielectric layer extending between the lower electrode and the upper electrode. The lower electrode may include a doped region that contacts the dielectric layer, and the doped region of the lower electrode is configured to increase a capacitance of the capacitor.

公开(公告)号：US11342329B2

公开(公告)日：2022-05-24

申请号：US16903586

申请日：2020-06-17

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Gihee Cho ,  Jungoo Kang ,  Hyun-Suk Lee ,  Sanghyuck Ahn

IPC: H01L27/108 ,  H01L49/02 ,  H01L21/02

Abstract: A semiconductor memory device includes a capacitor having a bottom electrode and a top electrode, a dielectric layer between the bottom and top electrodes, and an interface layer between the top electrode and the dielectric layer, the interface layer including a metal oxide and an additional constituent at a grain boundary of the interface layer.

公开(公告)号：US12205952B2

公开(公告)日：2025-01-21

申请号：US18539062

申请日：2023-12-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Gihee Cho ,  Sanghyuck Ahn ,  Hyun-Suk Lee ,  Jungoo Kang ,  Jin-Su Lee ,  Hongsik Chae

IPC: H01L27/10 ,  G11C8/14 ,  H01L49/02 ,  H10B12/00

Abstract: A semiconductor device includes; a bottom electrode on a substrate, a supporting pattern between the bottom electrode and an adjacent bottom electrode, a top electrode covering the bottom electrode and the supporting pattern, and a dielectric layer between the bottom electrode and the top electrode and between the supporting pattern and the top electrode. The bottom electrode may include a first portion including a seam and a second portion on the first portion, a top end of the second portion may be disposed at a height lower than an upper surface of the supporting pattern, and a portion of a bottom end of the second portion may be exposed to the seam.

公开(公告)号：US12119374B2

公开(公告)日：2024-10-15

申请号：US17857383

申请日：2022-07-05

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Gihee Cho ,  Sangyeol Kang ,  Jungoo Kang ,  Taekyun Kim ,  Jiwoon Park ,  Sanghyuck Ahn ,  Jin-Su Lee ,  Hyun-Suk Lee ,  Hongsik Chae

IPC: H10B12/00 ,  H01L49/02

CPC classification number: H01L28/92 ,  H10B12/0335 ,  H10B12/053 ,  H10B12/315 ,  H10B12/34 ,  H10B12/482 ,  H10B12/488

Abstract: A semiconductor device and a method of manufacturing the same, the device including a plurality of lower electrodes on a semiconductor substrate; a support pattern connecting the lower electrodes at sides of the lower electrodes; and a dielectric layer covering the lower electrodes and the support pattern, wherein each of the plurality of lower electrodes includes a pillar portion extending in a vertical direction perpendicular to a top surface of the semiconductor substrate; and a protrusion protruding from a sidewall of the pillar portion so as to be in contact with the support pattern, the pillar portion includes a conductive material, the protrusion includes a same conductive material as the pillar portion and is further doped with impurities.

公开(公告)号：US20240120196A1

公开(公告)日：2024-04-11

申请号：US18529024

申请日：2023-12-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyun-Suk Lee ,  Jungoo Kang ,  Gihee Cho ,  Sanghyuck Ahn

IPC: H01L21/02 ,  H01L21/12 ,  H01L21/302 ,  H01L21/768

CPC classification number: H01L21/0228 ,  H01L21/12 ,  H01L21/302 ,  H01L21/76885

Abstract: A method of manufacturing a semiconductor device includes: forming electrode holes by etching a mold structure including a mold layer and a support layer which are stacked on a substrate; forming lower electrode pillars filling the electrode holes; etching a portion of the support layer between the lower electrode pillars to form a support pattern having a through-hole exposing a portion of a top surface of the mold layer; removing the mold layer through the through-hole to expose sidewalls of the lower electrode pillars; and selectively forming lower electrode patterns on the sidewalls and top surfaces of the lower electrode pillars.

公开(公告)号：US11569344B2

公开(公告)日：2023-01-31

申请号：US16798826

申请日：2020-02-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jungoo Kang ,  Hyunsuk Lee ,  Gihee Cho ,  Sanghyuck Ahn

IPC: H01L49/02 ,  H01G4/12 ,  H01L23/522

Abstract: An integrated circuit device includes a capacitor structure, wherein the capacitor structure includes: a bottom electrode over a substrate; a supporter on a sidewall of the bottom electrode; a dielectric layer on the bottom electrode and the supporter; and a top electrode on the dielectric layer and covering the bottom electrode. The bottom electrode comprises: a base electrode layer over the substrate and extending in a first direction that is perpendicular to a top surface of the substrate, and a conductive capping layer including niobium nitride that is between a sidewall of the base electrode layer and the dielectric layer, and also between a top surface of the base electrode layer and the dielectric layer.