公开(公告)号：US20150243727A1

公开(公告)日：2015-08-27

申请号：US14708423

申请日：2015-05-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ki-Yeon Park ,  Jae-Hyoung Choi ,  Vladimir Urazaev ,  Jin-Ha Jeong

IPC: H01L49/02 ,  H01L27/108

CPC classification number: H01L27/1085 ,  H01L21/283 ,  H01L21/311 ,  H01L21/76802 ,  H01L27/108 ,  H01L27/10852 ,  H01L28/60 ,  H01L28/92

Abstract: Provided are semiconductor devices and methods of fabricating the same. The methods may include forming a molding layer on a semiconductor substrate. A storage electrode passing through the molding layer is formed. A part of the storage electrode is exposed by partially etching the molding layer. A sacrificial oxide layer is formed by oxidizing the exposed part of the storage electrode. The partially-etched molding layer and the sacrificial oxide layer are removed. A capacitor dielectric layer is formed on the substrate of which the molding layer and the sacrificial oxide layer are removed. A plate electrode is formed on the capacitor dielectric layers.

Abstract translation: 提供半导体器件及其制造方法。 所述方法可以包括在半导体衬底上形成模塑层。 形成通过成形层的存储电极。 存储电极的一部分通过部分蚀刻成型层而露出。 通过氧化存储电极的暴露部分形成牺牲氧化物层。 去除部分蚀刻的成型层和牺牲氧化物层。 在其上移除成型层和牺牲氧化物层的基板上形成电容器电介质层。 在电容器电介质层上形成平板电极。

公开(公告)号：US09685450B2

公开(公告)日：2017-06-20

申请号：US15072521

申请日：2016-03-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ki-Yeon Park ,  Jae-Hyoung Choi ,  Vladimir Urazaev ,  Jin-Ha Jeong

IPC: H01L21/20 ,  H01L27/108 ,  H01L49/02 ,  H01L21/283 ,  H01L21/311 ,  H01L21/768

CPC classification number: H01L27/1085 ,  H01L21/283 ,  H01L21/311 ,  H01L21/76802 ,  H01L27/108 ,  H01L27/10852 ,  H01L28/60 ,  H01L28/92

Abstract: Provided are semiconductor devices and methods of fabricating the same. The methods may include forming a molding layer on a semiconductor substrate. A storage electrode passing through the molding layer is formed. A part of the storage electrode is exposed by partially etching the molding layer. A sacrificial oxide layer is formed by oxidizing the exposed part of the storage electrode. The partially-etched molding layer and the sacrificial oxide layer are removed. A capacitor dielectric layer is formed on the substrate of which the molding layer and the sacrificial oxide layer are removed. A plate electrode is formed on the capacitor dielectric layers.

公开(公告)号：US09076886B2

公开(公告)日：2015-07-07

申请号：US13960323

申请日：2013-08-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dong-Il Park ,  Ae-Gyeong Kim ,  Jong-Sam Kim ,  Kyoung-Eun Uhm ,  Tae-Cheol Lee ,  Yong-Sang Jeong ,  Jin-Ha Jeong

IPC: H01L29/66 ,  H01L21/8234 ,  H01L29/423 ,  H01L29/40 ,  H01L29/78

CPC classification number: H01L21/823468 ,  H01L21/823456 ,  H01L21/823462 ,  H01L29/401 ,  H01L29/4236 ,  H01L29/7834

Abstract: A semiconductor device and a method for fabricating the same are provided. The semiconductor device includes a device isolation region, a trench formed in the device isolation region, a void connected to the trench in the device isolation region, a first mask pattern formed along sidewalls of the trench and protruding inwardly with respect to the void, a gate insulating film formed along the sidewall of the void, and a gate electrode filling the trench and at least a portion of the void.

Abstract translation: 提供了一种半导体器件及其制造方法。 半导体器件包括器件隔离区域，形成在器件隔离区域中的沟槽，连接到器件隔离区域中的沟槽的空穴，沿着沟槽的侧壁形成并相对于空隙向内突出的第一掩模图案， 沿着空隙的侧壁形成的栅极绝缘膜，以及填充沟槽和至少一部分空隙的栅电极。

公开(公告)号：US20140256112A1

公开(公告)日：2014-09-11

申请号：US14193071

申请日：2014-02-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ki-Yeon Park ,  Jae-Hyoung Choi ,  Vladimir Urazaev ,  Jin-Ha Jeong

IPC: H01L49/02

CPC classification number: H01L27/1085 ,  H01L21/283 ,  H01L21/311 ,  H01L21/76802 ,  H01L27/108 ,  H01L27/10852 ,  H01L28/60 ,  H01L28/92

Abstract: Provided are semiconductor devices and methods of fabricating the same. The methods may include forming a molding layer on a semiconductor substrate. A storage electrode passing through the molding layer is formed. A part of the storage electrode is exposed by partially etching the molding layer. A sacrificial oxide layer is formed by oxidizing the exposed part of the storage electrode. The partially-etched molding layer and the sacrificial oxide layer are removed. A capacitor dielectric layer is formed on the substrate of which the molding layer and the sacrificial oxide layer are removed. A plate electrode is formed on the capacitor dielectric layers.

Abstract translation: 提供半导体器件及其制造方法。 所述方法可以包括在半导体衬底上形成模塑层。 形成通过成形层的存储电极。 存储电极的一部分通过部分蚀刻成型层而露出。 通过氧化存储电极的暴露部分形成牺牲氧化物层。 去除部分蚀刻的成型层和牺牲氧化物层。 在其上移除成型层和牺牲氧化物层的基板上形成电容器电介质层。 在电容器电介质层上形成平板电极。

公开(公告)号：US20140042528A1

公开(公告)日：2014-02-13

申请号：US13960323

申请日：2013-08-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dong-Il Park ,  Ae-Gyeong Kim ,  Jong-Sam Kim ,  Kyoung-Eun Uhm ,  Tae-Cheol Lee ,  Yong-Sang Jeong ,  Jin-Ha Jeong

IPC: H01L21/8234 ,  H01L29/40 ,  H01L29/423

CPC classification number: H01L21/823468 ,  H01L21/823456 ,  H01L21/823462 ,  H01L29/401 ,  H01L29/4236 ,  H01L29/7834

Abstract: A semiconductor device and a method for fabricating the same are provided. The semiconductor device includes a device isolation region, a trench formed in the device isolation region, a void connected to the trench in the device isolation region, a first mask pattern formed along sidewalls of the trench and protruding inwardly with respect to the void, a gate insulating film formed along the sidewall of the void, and a gate electrode filling the trench and at least a portion of the void.

Abstract translation: 提供了一种半导体器件及其制造方法。 半导体器件包括器件隔离区域，形成在器件隔离区域中的沟槽，连接到器件隔离区域中的沟槽的空穴，沿着沟槽的侧壁形成并相对于空隙向内突出的第一掩模图案， 沿着空隙的侧壁形成的栅极绝缘膜，以及填充沟槽和至少一部分空隙的栅电极。

公开(公告)号：US09324781B2

公开(公告)日：2016-04-26

申请号：US14708423

申请日：2015-05-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ki-Yeon Park ,  Jae-Hyoung Choi ,  Vladimir Urazaev ,  Jin-Ha Jeong

IPC: H01L21/20 ,  H01L49/02 ,  H01L27/108

CPC classification number: H01L27/1085 ,  H01L21/283 ,  H01L21/311 ,  H01L21/76802 ,  H01L27/108 ,  H01L27/10852 ,  H01L28/60 ,  H01L28/92

Abstract: Provided are semiconductor devices and methods of fabricating the same. The methods may include forming a molding layer on a semiconductor substrate. A storage electrode passing through the molding layer is formed. A part of the storage electrode is exposed by partially etching the molding layer. A sacrificial oxide layer is formed by oxidizing the exposed part of the storage electrode. The partially-etched molding layer and the sacrificial oxide layer are removed. A capacitor dielectric layer is formed on the substrate of which the molding layer and the sacrificial oxide layer are removed. A plate electrode is formed on the capacitor dielectric layers.

公开(公告)号：US09059331B2

公开(公告)日：2015-06-16

申请号：US14193071

申请日：2014-02-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ki-Yeon Park ,  Jae-Hyoung Choi ,  Vladimir Urazaev ,  Jin-Ha Jeong

IPC: H01L21/20 ,  H01L49/02 ,  H01L27/108

CPC classification number: H01L27/1085 ,  H01L21/283 ,  H01L21/311 ,  H01L21/76802 ,  H01L27/108 ,  H01L27/10852 ,  H01L28/60 ,  H01L28/92

Abstract: Provided are semiconductor devices and methods of fabricating the same. The methods may include forming a molding layer on a semiconductor substrate. A storage electrode passing through the molding layer is formed. A part of the storage electrode is exposed by partially etching the molding layer. A sacrificial oxide layer is formed by oxidizing the exposed part of the storage electrode. The partially-etched molding layer and the sacrificial oxide layer are removed. A capacitor dielectric layer is formed on the substrate of which the molding layer and the sacrificial oxide layer are removed. A plate electrode is formed on the capacitor dielectric layers.

Abstract translation: 提供半导体器件及其制造方法。 所述方法可以包括在半导体衬底上形成模塑层。 形成通过成型层的存储电极。 存储电极的一部分通过部分蚀刻成型层而露出。 通过氧化存储电极的暴露部分形成牺牲氧化物层。 去除部分蚀刻的成型层和牺牲氧化物层。 在其上移除成型层和牺牲氧化物层的基板上形成电容器电介质层。 在电容器电介质层上形成平板电极。

公开(公告)号：US09058956B2

公开(公告)日：2015-06-16

申请号：US14249132

申请日：2014-04-09

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jin Choi ,  Jin-Ha Jeong ,  Urazaev Vladimir ,  Hea-Yun Lee

IPC: H01J37/06 ,  H01J37/30 ,  G03F1/78 ,  G03F7/20 ,  H01J37/302 ,  H01J37/317 ,  G03F1/20 ,  B82Y10/00 ,  B82Y40/00

CPC classification number: H01J37/06 ,  B82Y10/00 ,  B82Y40/00 ,  G03F1/20 ,  G03F1/78 ,  G03F7/2063 ,  H01J37/3026 ,  H01J37/3174 ,  H01J2237/0458 ,  H01J2237/31764 ,  H01J2237/31776 ,  Y10S430/143

Abstract: A method of forming a reticle includes: loading a blank reticle; projecting an electron beam; moving a second aperture plate having a first pattern aperture and a second pattern aperture so that the first pattern aperture is directly overlapped by a first aperture of a first aperture plate, the electron beam passing through the first pattern aperture after passing the first aperture; exposing the blank reticle with the electron beam after the electron beam passes the first pattern aperture, to form a first exposure pattern; moving the second aperture plate so that the second pattern aperture is directly overlapped by the first aperture of the first aperture plate, the electron beam passing through the second pattern aperture after passing the first aperture; exposing the blank reticle with the electron beam after the electron beam passes the second pattern aperture, to form a second exposure pattern; and developing the blank reticle having the first and second exposure patterns to form the reticle having first and second patterns.

Abstract translation: 形成掩模版的方法包括：加载空白掩模版; 投射电子束; 移动具有第一图案孔和第二图案孔的第二孔板，使得第一图案孔与第一孔板的第一孔直接重叠，该电子束在通过第一孔之后通过第一图案孔; 在电子束通过第一图案孔之后，用电子束曝光空白掩模版，形成第一曝光图案; 移动所述第二孔板，使得所述第二图案孔径与所述第一孔板的所述第一孔直接重叠，所述电子束在通过所述第一孔之后通过所述第二图案孔; 在电子束通过第二图案孔之后，用电子束曝光空白掩模版，形成第二曝光图案; 并且显影具有第一和第二曝光图案的空白掩模版，以形成具有第一和第二图案的掩模版。