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    MEMORY SYSTEMS AND DEVICES THAT SUPPORT CLOCK-TO-CLOCK ALIGNMENT, TRAINING AND METHODS OF OPERATING SAME
    1.
    发明申请
    MEMORY SYSTEMS AND DEVICES THAT SUPPORT CLOCK-TO-CLOCK ALIGNMENT, TRAINING AND METHODS OF OPERATING SAME 审中-公开

    公开(公告)号：US20190172509A1

    公开(公告)日：2019-06-06

    申请号：US16045887

    申请日：2018-07-26

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： DONG-SEOK KANG ,  Byung-Chul Kim

    IPC: G11C7/22 ,  G06F3/06

    Abstract: A memory device performs first training including a plurality of loop operations to align a main clock signal and a data clock signal, which are received from a memory controller. A method of operating the memory device includes generating division ratio information indicating a division ratio set based on a frequency ratio of the main clock signal to the data clock signal and transmitting the division ratio information to the memory controller to perform the first training. A first loop operation includes: receiving first phase control information, which is generated based on the division ratio information, from the memory controller, dividing the data clock signal based on the division ratio to generate a division data clock signal, selecting a first phase from among a plurality of phases based on the first phase control information, generating a first comparison target clock signal that is shifted from the division data clock signal by the first phase, comparing a phase of the first comparison target clock signal with a phase of the main clock signal, and transmitting a first phase comparison result to the memory controller.

    Apparatus and method for playing music
    4.
    发明授权
    Apparatus and method for playing music 有权
    用于播放音乐的装置和方法

    公开(公告)号：US09538318B2

    公开(公告)日：2017-01-03

    申请号：US14980406

    申请日：2015-12-28

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Byung-Chul Kim

    IPC: H04W4/00 ,  H04M1/725 ,  H04B5/00 ,  H04W76/02 ,  H04L29/06

    CPC classification number: H04W4/80 ,  H04B5/00 ,  H04L65/60 ,  H04M1/7253 ,  H04M1/72558 ,  H04M2250/04 ,  H04W76/14

    Abstract: Provided is an apparatus and method for playing music, which can play music by simply sharing the music with an external device. An apparatus for playing music includes a first portable terminal and a second portable terminal. The first portable terminal transmits FM channel information of an FM transmitter, which is set to broadcast in-play music thereof, and an FM radio application execution command through near field communication (NFC). The second portable terminal receives the FM channel information and the FM radio application execution command from the first portable terminal through the NFC, then executes the FM radio application based on the FM channel information to receive and play the music broadcasted from the first portable terminal.

    Abstract translation: 提供了一种用于播放音乐的装置和方法，其可以通过简单地与外部设备共享音乐来播放音乐。 用于播放音乐的装置包括第一便携式终端和第二便携式终端。 第一便携式终端通过近场通信（NFC）发送被设置为广播其播放中音乐的FM发射机的FM频道信息和FM无线电应用执行命令。 第二便携式终端通过NFC从第一便携式终端接收FM频道信息和FM无线电应用执行命令，然后基于FM频道信息执行FM无线电应用以接收和播放从第一便携式终端广播的音乐。

    Memory systems and devices that support clock-to-clock alignment, training and methods of operating same
    5.
    发明授权
    Memory systems and devices that support clock-to-clock alignment, training and methods of operating same 有权

    公开(公告)号：US10593382B2

    公开(公告)日：2020-03-17

    申请号：US16045887

    申请日：2018-07-26

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Dong-Seok Kang ,  Byung-Chul Kim

    IPC: G11C7/22 ,  G06F3/06 ,  G11C7/10 ,  H03L7/00

    Abstract: A memory device performs first training including a plurality of loop operations to align a main clock signal and a data clock signal, which are received from a memory controller. A method of operating the memory device includes generating division ratio information indicating a division ratio set based on a frequency ratio of the main clock signal to the data clock signal and transmitting the division ratio information to the memory controller to perform the first training. A first loop operation includes: receiving first phase control information, which is generated based on the division ratio information, from the memory controller, dividing the data clock signal based on the division ratio to generate a division data clock signal, selecting a first phase from among a plurality of phases based on the first phase control information, generating a first comparison target clock signal that is shifted from the division data clock signal by the first phase, comparing a phase of the first comparison target clock signal with a phase of the main clock signal, and transmitting a first phase comparison result to the memory controller.

    Apparatus and method for playing music
    6.
    发明授权
    Apparatus and method for playing music 有权

    公开(公告)号：US09232347B2

    公开(公告)日：2016-01-05

    申请号：US14695408

    申请日：2015-04-24

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Byung-Chul Kim

    IPC: H04B5/00 ,  H04W4/00 ,  H04M1/725 ,  H04W76/02

    CPC classification number: H04W4/80 ,  H04B5/00 ,  H04L65/60 ,  H04M1/7253 ,  H04M1/72558 ,  H04M2250/04 ,  H04W76/14

    Abstract: Provided is an apparatus and method for playing music, which can play music by simply sharing the music with an external device. An apparatus for playing music includes a first portable terminal and a second portable terminal. The first portable terminal transmits FM channel information of an FM transmitter, which is set to broadcast in-play music thereof, and an FM radio application execution command through near field communication (NFC). The second portable terminal receives the FM channel information and the FM radio application execution command from the first portable terminal through the NFC, then executes the FM radio application based on the FM channel information to receive and play the music broadcasted from the first portable terminal.

    SEMICONDUCTOR MEMORY DEVICE CAPABLE OF PREVENTING NEGATIVE BIAS TEMPERATURE INSTABILITY (NBTI) USING SELF REFRESH INFORMATION
    7.
    发明申请
    SEMICONDUCTOR MEMORY DEVICE CAPABLE OF PREVENTING NEGATIVE BIAS TEMPERATURE INSTABILITY (NBTI) USING SELF REFRESH INFORMATION 有权
    使用自我修复信息防止负偏差温度不稳定性（NBTI）的半导体存储器件

    公开(公告)号：US20150155029A1

    公开(公告)日：2015-06-04

    申请号：US14325852

    申请日：2014-07-08

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Byung-Chul Kim ,  Yang-Ki Kim ,  Seong-Hwan Jeon

    IPC: G11C11/406

    CPC classification number: G11C11/40615 ,  G11C7/04 ,  G11C11/406 ,  G11C11/4067 ,  G11C11/4076 ,  G11C2207/104 ,  G11C2211/4065

    Abstract: A semiconductor memory device that includes a command decoder, a refresh controller, an oscillator and a delay unit. The command decoder generates a self refresh command, and the oscillator generates an oscillation signal. The refresh controller generates a refresh control signal and a recovery signal in response to the self refresh command and the oscillation signal. The delay unit transitions internal nodes included in the delay unit that are not transitioned during a refresh period in response to the refresh control signal and the recovery signal.

    Abstract translation: 一种半导体存储器件，包括命令解码器，刷新控制器，振荡器和延迟单元。 命令解码器产生自刷新命令，振荡器产生振荡信号。 刷新控制器响应于自刷新命令和振荡信号产生刷新控制信号和恢复信号。 响应于刷新控制信号和恢复信号，延迟单元转换延迟单元中包括的内部节点，其在刷新周期期间未被转换。

    Redundancy control circuit and memory device including the same
    8.
    发明授权
    Redundancy control circuit and memory device including the same 有权
    冗余控制电路和包括其的存储器件

    公开(公告)号：US08755238B2

    公开(公告)日：2014-06-17

    申请号：US13926005

    申请日：2013-06-25

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Byung-Chul Kim

    IPC: G11C7/00 ,  G11C7/06 ,  G11C17/18

    CPC classification number: G11C29/04 ,  G11C17/14 ,  G11C29/785 ,  H01L22/22

    Abstract: A redundancy control circuit includes an address fuse circuit and a first circuit. The address fuse circuit includes a plurality of first fuses. Each of the first fuses is configured to be cut based on a result of comparing a number of bits of a defective input address having a first logic level with a number of bits of the defective input address having a second logic level. The address fuse circuit is configured to generate a first address using the first fuses based on a cutting operation that depends on the result of comparing. The first circuit is configured to output either the first address or a second address that is an inverted address of the first address as a repair address, wherein a logic level of each of bits of the repair address is the same as that of the defective input address.

    Abstract translation: 冗余控制电路包括地址熔丝电路和第一电路。 地址熔丝电路包括多个第一保险丝。 基于将具有第一逻辑电平的有缺陷的输入地址的比特数与具有第二逻辑电平的有缺陷的输入地址的比特数进行比较的结果，将每个第一保险丝配置为被切割。 地址熔丝电路被配置为基于取决于比较结果的切割操作，使用第一保险丝来生成第一地址。 第一电路被配置为将作为第一地址的反转地址的第一地址或第二地址作为修复地址输出，其中修复地址的每一位的逻辑电平与有缺陷输入的位的逻辑电平相同 地址。

    Reradiation repeater
    9.
    发明授权
    Reradiation repeater 有权

    公开(公告)号：US10116059B2

    公开(公告)日：2018-10-30

    申请号：US15036713

    申请日：2015-07-07

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Hyun-Jin Kim ,  Byung-Chul Kim ,  Young-Ju Lee ,  Dong-Kyu Choi

    IPC: H01Q19/10 ,  H01Q15/14 ,  H01Q1/38 ,  H01Q1/24 ,  H01Q1/48 ,  H01Q3/46

    Abstract: According to an embodiment of the present invention, a reradiation repeater may comprise a dielectric substrate, a ground conductor provided on a surface of the dielectric substrate, and a plurality of unit cells provided on another surface of the dielectric substrate, wherein the unit cells reradiate radio waves in the same direction by directing the radio waves which are incident onto the unit cells at different angles to a same direction. The reradiation repeater may facilitate to select, e.g., an installation location and secure a good reradiation capability even when the installation environment is changed (e.g., a variation in the installation location of base station facility), contributing to coverage of a shadow zone. The reradiation repeater may be implemented in various manners according to embodiments of the present invention.

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