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公开(公告)号：US09613876B2
公开(公告)日：2017-04-04
申请号：US14976492
申请日：2015-12-21
Applicant: Samsung Display Co., Ltd.
Inventor： Yong Tae Cho , Joong Tae Kim , In Woo Kim , Kwang Su Park , Da Young Lee , Min Ha Hwang , Seong Jun Hwang
CPC classification number: H01L22/32 , H01L22/30 , H01L27/1222 , H01L27/1248
Abstract: A thin film transistor (TFT) substrate includes a base substrate, a TFT disposed on the base substrate. The TFT includes a gate electrode, a semiconductor layer comprising a channel region, and a source electrode and a drain electrode spaced apart from one another by a length of the channel region. The TFT substrate further includes a gate insulating layer disposed between the gate electrode and the semiconductor layer and a measuring pattern configured to measure a length of the channel region.
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公开(公告)号：US10088716B2
公开(公告)日：2018-10-02
申请号：US15217922
申请日：2016-07-22
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor： In Woo Kim , Joong Tae Kim , Da Young Lee , Ki Hun Jeong , Yong Tae Cho , Min Ha Hwang
IPC: G02F1/1343
Abstract: An LCD includes: pixel electrodes; a common electrode including a plurality of slits; and a liquid crystal layer interposed between the pixel electrodes and the common electrode. The plurality of slits include a first slit and a second slit that are disposed adjacent to each other in a first direction. The first slit includes a first central portion and a first extension portion extending from the first central portion toward the second slit, and the second slit includes a second central portion and a first extension portion extending from the second central portion toward the first slit. An end of the first extension portion of the first slit and an end of the first extension portion of the second slit are spaced apart from each other; and disposed, in a staggered manner, on opposite sides of an imaginary center line connecting the first central portion and the second central portion.
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公开(公告)号：US20160293504A1
公开(公告)日：2016-10-06
申请号：US14976492
申请日：2015-12-21
Applicant: Samsung Display Co., Ltd.
Inventor： Yong Tae Cho , Joong Tae Kim , In Woo Kim , Kwang Su Park , Da Young Lee , Min Ha Hwang , Seong Jun Hwang
CPC classification number: H01L22/32 , H01L22/30 , H01L27/1222 , H01L27/1248
Abstract: A thin film transistor (TFT) substrate includes a base substrate, a TFT disposed on the base substrate. The TFT includes a gate electrode, a semiconductor layer comprising a channel region, and a source electrode and a drain electrode spaced apart from one another by a length of the channel region. The TFT substrate further includes a gate insulating layer disposed between the gate electrode and the semiconductor layer and a measuring pattern configured to measure a length of the channel region.
Abstract translation: 薄膜晶体管（TFT）基板包括基底基板，设置在基底基板上的TFT。 TFT包括栅电极，包括沟道区的半导体层，以及以沟道区的长度彼此间隔开的源电极和漏电极。 TFT基板还包括设置在栅极电极和半导体层之间的栅极绝缘层和被配置为测量沟道区域的长度的测量图案。
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公开(公告)号：US11552108B2
公开(公告)日：2023-01-10
申请号：US17122859
申请日：2020-12-15
Applicant: Samsung Display Co., Ltd.
Inventor： Byung Hwan Chu , Sho Yeon Kim , Wan-Soon Im , Yong Tae Cho
IPC: H01L27/12 , G09G3/20 , H01L29/423 , H01L29/417
Abstract: A transistor display panel including a substrate, a gate line disposed on the substrate and extending in a first direction, a gate electrode protruding from the gate line, a gate insulating layer disposed on the gate line and the gate electrode, a semiconductor layer and an auxiliary layer disposed on the gate insulating layer and spaced apart from each other, a data line disposed on the gate insulating layer and extending in a second direction which is a direction crossing the gate line, a drain electrode disposed on the gate insulating layer and the semiconductor layer and spaced apart from the data line, and a pixel electrode connected to the drain electrode, in which the auxiliary layer overlaps an edge of the gate electrode in a plan view.
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公开(公告)号：US10234716B2
公开(公告)日：2019-03-19
申请号：US15801113
申请日：2017-11-01
Applicant: Samsung Display Co., Ltd.
Inventor： Jee Hoon Han , O Sung Seo , Kyung Suk Jung , Yong Tae Cho
IPC: G02F1/1339 , G02F1/1335 , G02F1/1343 , G02F1/1362
Abstract: A liquid crystal display device includes a display area, a peripheral area, and a boundary area between the display area and the peripheral area and further includes: a first substrate; a switching element disposed on the first substrate in the display area; a pad disposed on the first substrate in the peripheral area and electrically connected with the switching element; a protective film disposed on the first substrate in the display area, the peripheral area, and the boundary area, and covering the switching element and the pad; a color filter disposed on the protective film in the display area; and a planarization film covering the color filter and contacting the protective film in the boundary area and the peripheral area. The planarization film is provided with a first opening overlapping the pad and at least one second opening formed in the boundary area.
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Patent Agency Ranking
公开(公告)号：US09685130B2
公开(公告)日：2017-06-20
申请号：US14219433
申请日：2014-03-19
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor： Seung Kyu Lee , Woo Sung Sohn , Yong Tae Cho
IPC: G02F1/136 , G09G3/36 , G02F1/1362 , G02F1/1368
CPC classification number: G09G3/3655 , G02F1/13624 , G02F1/136286 , G02F1/1368 , G02F2001/136245 , G09G3/3614 , G09G2300/043 , G09G2300/0823
Abstract: A display device includes a substrate, a gate line connected to a gate driver, a reference voltage line, a data line crossing the gate line and the reference voltage line, a first thin film transistor including a first drain electrode and connected to the gate line and the data line, a second thin film transistor including a second drain electrode, a third thin film transistor connected to the gate line, the reference voltage line, and the second thin film transistor, and a pixel electrode including a first sub-pixel electrode connected to the first thin film transistor and a second sub-pixel electrode connected to the second thin film transistor. The first drain electrode overlaps the reference voltage line, and an area of a region in which the first drain electrode and the reference voltage line overlap each other increases in a direction toward the gate driver.
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公开(公告)号：US12205959B2
公开(公告)日：2025-01-21
申请号：US17550429
申请日：2021-12-14
Applicant: Samsung Display Co., LTD.
Inventor： Jong Chan Lee , Hyun Kim , Jeong Su Park , Jeong Kook Wang , Hyun Wook Lee , Yong Tae Cho
Abstract: A display device includes a first electrode and a second electrode spaced apart from each other, each of the first electrode and the second electrode including an electrode base layer, a main electrode layer disposed on the electrode base layer, and an electrode upper layer disposed on a portion of the main electrode layer, a first insulating layer disposed on the first electrode and the second electrode, light-emitting elements disposed on the first electrode and the second electrode on the first insulating layer, a first connecting electrode electrically contacting the light-emitting elements, and a second connecting electrode electrically contacting the light-emitting elements. The first electrode includes a first part, the second electrode includes a second part, and the light-emitting elements are disposed on the first part and the second part.
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公开(公告)号：US10566323B2
公开(公告)日：2020-02-18
申请号：US15798921
申请日：2017-10-31
Applicant: Samsung Display Co., Ltd.
Inventor： Jee Hoon Han , Won Jun Lee , Kyung Suk Jung , Yong Tae Cho , O Sung Seo , Yun Seok Lee
IPC: H01L27/02 , H01L27/12 , H01L29/417 , H01L29/49 , G09G3/36 , G02F1/1362 , G02F1/1335 , G02F1/1368
Abstract: A scan driver has a plurality of stages configured to supply a scan signal to scan lines. The plurality of stages include a stage coupled to a scan line of the scan lines. The stage includes a first transistor including a gate electrode, a drain electrode and a source electrode and is configured to output the scan signal to the scan line; a second transistor provided on a side of the first transistor and connected to the drain electrode; a third transistor provided on the side of the first transistor and connected to the source electrode; a capacitor provided between the scan line and the first transistor; a first dummy transistor provided between the first transistor and the capacitor and connected to the capacitor; and a second dummy transistor provided between the first transistor and the second transistor and connected to both the first transistor and the second transistor.
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公开(公告)号：US20210104553A1
公开(公告)日：2021-04-08
申请号：US17122859
申请日：2020-12-15
Applicant: Samsung Display Co., Ltd.
Inventor： Byung Hwan Chu , Sho Yeon Kim , Wan-Soon Im , Yong Tae Cho
IPC: H01L27/12 , G09G3/20 , H01L29/423
Abstract: A transistor display panel including a substrate, a gate line disposed on the substrate and extending in a first direction, a gate electrode protruding from the gate line, a gate insulating layer disposed on the gate line and the gate electrode, a semiconductor layer and an auxiliary layer disposed on the gate insulating layer and spaced apart from each other, a data line disposed on the gate insulating layer and extending in a second direction which is a direction crossing the gate line, a drain electrode disposed on the gate insulating layer and the semiconductor layer and spaced apart from the data line, and a pixel electrode connected to the drain electrode, in which the auxiliary layer overlaps an edge of the gate electrode in a plan view.
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10.发明授权公开(公告)号：US10515985B2
公开(公告)日：2019-12-24
申请号：US16059088
申请日：2018-08-09
Applicant: Samsung Display Co., Ltd.
Inventor： Byung Hwan Chu , Sho Yeon Kim , Wan-Soon Im , Yong Tae Cho
IPC: H01L27/12 , G09G3/20 , H01L29/423 , H01L29/417
Abstract: A transistor display panel including a substrate, a gate line disposed on the substrate and extending in a first direction, a gate electrode protruding from the gate line, a gate insulating layer disposed on the gate line and the gate electrode, a semiconductor layer and an auxiliary layer disposed on the gate insulating layer and spaced apart from each other, a data line disposed on the gate insulating layer and extending in a second direction which is a direction crossing the gate line, a drain electrode disposed on the gate insulating layer and the semiconductor layer and spaced apart from the data line, and a pixel electrode connected to the drain electrode, in which the auxiliary layer overlaps an edge of the gate electrode in a plan view.
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