Abstract:
A liquid crystal display panel includes a base substrate, a first step difference compensating pattern, a gate metal pattern, a semiconductor pattern, a source electrode, a drain electrode, a pixel electrode and a color filter. The first step difference compensating pattern is disposed on the base substrate and includes an inorganic material. The gate metal pattern is disposed on the first step difference compensating pattern and includes a gate electrode and a gate line electrically connected to the gate electrode. The semiconductor pattern is overlapped with the gate electrode. The source electrode is electrically connected to the semiconductor pattern. The drain electrode is electrically connected to the semiconductor pattern and is spaced apart from the source electrode. The pixel electrode is electrically connected to the drain electrode. The color filter is overlapped with the pixel electrode.
Abstract:
A thin film transistor array panel includes: a substrate including a display area and a drive region in which a driving chip for transmitting a driving signal to the pixels is located; a gate line in the display area; a storage electrode line; a gate driving pad coupled to the driving chip; a gate insulating layer; a first semiconductor layer on the gate insulating layer and overlapped with a gate electrode protruding from the gate line; a second semiconductor layer formed on the gate insulating layer and overlapped with a sustain electrode protruding from the storage electrode line; a data line crossing the gate line in an insulated manner and a drain electrode separated from the data line; and a pixel electrode coupled to the drain electrode, and the drain electrode comprises a drain bar facing the source electrode, and a drain extender overlapped with the second semiconductor layer.
Abstract:
An array substrate includes a thin film transistor on a substrate, a color pattern on the substrate, a light blocking pattern on the thin film transistor, an organic insulation layer covering the color pattern and the light blocking pattern, a pixel electrode on the organic insulation layer, and a low-reflective pattern on the pixel electrode. An opening portion is defined in the light blocking pattern and exposes the thin film transistor. A contact hole is defined in the organic insulation layer and corresponding to the opening portion. The pixel electrode is electrically connected to the thin film transistor through the contact hole. The low-reflective pattern corresponds to the opening portion.
Abstract:
An array substrate includes a thin film transistor on a substrate, a color pattern on the substrate, a light blocking pattern on the thin film transistor, an organic insulation layer covering the color pattern and the light blocking pattern, a pixel electrode on the organic insulation layer, and a low-reflective pattern on the pixel electrode. An opening portion is defined in the light blocking pattern and exposes the thin film transistor. A contact hole is defined in the organic insulation layer and corresponding to the opening portion. The pixel electrode is electrically connected to the thin film transistor through the contact hole. The low-reflective pattern corresponds to the opening portion.
Abstract:
A liquid crystal display panel includes a base substrate, a first step difference compensating pattern, a gate metal pattern, a semiconductor pattern, a source electrode, a drain electrode, a pixel electrode and a color filter. The first step difference compensating pattern is disposed on the base substrate and includes an inorganic material. The gate metal pattern is disposed on the first step difference compensating pattern and includes a gate electrode and a gate line electrically connected to the gate electrode. The semiconductor pattern is overlapped with the gate electrode. The source electrode is electrically connected to the semiconductor pattern. The drain electrode is electrically connected to the semiconductor pattern and is spaced apart from the source electrode. The pixel electrode is electrically connected to the drain electrode. The color filter is overlapped with the pixel electrode.
Abstract:
A thin film transistor array panel includes: a substrate including a display area and a drive region in which a driving chip for transmitting a driving signal to the pixels is located; a gate line in the display area; a storage electrode line; a gate driving pad coupled to the driving chip; a gate insulating layer; a first semiconductor layer on the gate insulating layer and overlapped with a gate electrode protruding from the gate line; a second semiconductor layer formed on the gate insulating layer and overlapped with a sustain electrode protruding from the storage electrode line; a data line crossing the gate line in an insulated manner and a drain electrode separated from the data line; and a pixel electrode coupled to the drain electrode, and the drain electrode comprises a drain bar facing the source electrode, and a drain extender overlapped with the second semiconductor layer.