Abstract:
A liquid crystal display includes a first substrate in which a pixel region is defined by a gate line and a data line intersecting the gate line, the pixel region being arranged in a matrix with other pixel regions, a pixel electrode disposed in the pixel region, and a shielding electrode disposed between the pixel electrode and another pixel electrode, wherein the shielding electrode is electrically connected to the data line and a different voltage from a voltage applied to the data line is applied to the shielding electrode.
Abstract:
Provided is a thin film transistor array panel. The thin film transistor array panel includes: an insulation substrate including a display area with a plurality of pixels and a peripheral area around the display area; a gate line and a data line positioned in the display area of the insulation substrate; a first driving signal transfer line and a second driving signal transfer line positioned in the peripheral area of the insulation substrate; a first insulating layer positioned on the gate line and the data line; and a first photosensitive film positioned on the first driving signal transfer line and the second driving signal transfer line, in which the first photosensitive film is disposed only in the peripheral area.
Abstract:
Provided is a thin film transistor array panel. The thin film transistor array panel includes: an insulation substrate including a display area with a plurality of pixels and a peripheral area around the display area; a gate line and a data line positioned in the display area of the insulation substrate; a first driving signal transfer line and a second driving signal transfer line positioned in the peripheral area of the insulation substrate; a first insulating layer positioned on the gate line and the data line; and a first photosensitive film positioned on the first driving signal transfer line and the second driving signal transfer line, in which the first photosensitive film is disposed only in the peripheral area.
Abstract:
Provided is a thin film transistor array panel. The thin film transistor array panel includes: an insulation substrate including a display area with a plurality of pixels and a peripheral area around the display area; a gate line and a data line positioned in the display area of the insulation substrate; a first driving signal transfer line and a second driving signal transfer line positioned in the peripheral area of the insulation substrate; a first insulating layer positioned on the gate line and the data line; and a first photosensitive film positioned on the first driving signal transfer line and the second driving signal transfer line, in which the first photosensitive film is disposed only in the peripheral area.
Abstract:
A liquid crystal display includes: a first substrate; a gate line and a reference electrode that are disposed on the first substrate and are spaced apart from each other; a gate insulating film disposed on the gate line and the reference electrode; a semiconductor disposed on the gate insulating film; a data conductor disposed on the semiconductor; a passivation film disposed on the data conductor; a color filter disposed on the passivation film; an overcoat disposed on the color filter; and a pixel electrode and a reference voltage line that are disposed on the overcoat and are spaced apart from each other, wherein the pixel electrode and the reference voltage line may include the same material, and the reference voltage line may be connected to the reference electrode through a reference voltage contact hole disposed in the gate insulating film, the passivation film, the color filter, and the overcoat.
Abstract:
Provided is a thin film transistor array panel. The thin film transistor array panel includes: an insulation substrate including a display area with a plurality of pixels and a peripheral area around the display area; a gate line and a data line positioned in the display area of the insulation substrate; a first driving signal transfer line and a second driving signal transfer line positioned in the peripheral area of the insulation substrate; a first insulating layer positioned on the gate line and the data line; and a first photosensitive film positioned on the first driving signal transfer line and the second driving signal transfer line, in which the first photosensitive film is disposed only in the peripheral area.