Abstract:
Provided is a thin film transistor array panel. The thin film transistor array panel includes: an insulation substrate including a display area with a plurality of pixels and a peripheral area around the display area; a gate line and a data line positioned in the display area of the insulation substrate; a first driving signal transfer line and a second driving signal transfer line positioned in the peripheral area of the insulation substrate; a first insulating layer positioned on the gate line and the data line; and a first photosensitive film positioned on the first driving signal transfer line and the second driving signal transfer line, in which the first photosensitive film is disposed only in the peripheral area.
Abstract:
A liquid crystal display includes: a substrate; a gate line disposed on the substrate; a storage voltage line disposed on the substrate and extending substantially parallel to the gate line; a data line disposed on the substrate; a reference voltage line disposed on the substrate and extending substantially parallel to the data line; first and second subpixel electrodes disposed in a pixel area; a first switching element connected to the gate line, the data line, and the first subpixel electrode; a second switching element connected to the gate line, the data line, and the second subpixel electrode; and a third switching element connected to the second subpixel electrode and the reference voltage line, wherein the storage voltage line and the reference voltage line are not connected to each other.
Abstract:
A liquid crystal display according to an exemplary embodiment of the present invention includes: a first substrate and an opposing second substrate; a first pixel electrode and a second pixel electrode disposed in a pixel area, on the first substrate, and including a plurality of branch electrodes; and a liquid crystal layer interposed between the first and second electrodes. Branches electrode of the first pixel electrode and the second pixel electrode are interlaced. The first pixel electrode has an extension disposed adjacent to the center of the pixel area, and a minimum distance between the extension and the adjacent branch electrode is different from an average minimum between the adjacent branch electrodes.
Abstract:
Provided is a thin film transistor array panel. The thin film transistor array panel includes: an insulation substrate including a display area with a plurality of pixels and a peripheral area around the display area; a gate line and a data line positioned in the display area of the insulation substrate; a first driving signal transfer line and a second driving signal transfer line positioned in the peripheral area of the insulation substrate; a first insulating layer positioned on the gate line and the data line; and a first photosensitive film positioned on the first driving signal transfer line and the second driving signal transfer line, in which the first photosensitive film is disposed only in the peripheral area.