公开(公告)号：US11824065B2

公开(公告)日：2023-11-21

申请号：US17467495

申请日：2021-09-07

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Yoon-Jong Cho ,  Seokje Seong ,  Seongjun Lee ,  Yoonjee Shin ,  Suyeon Yun ,  Wooho Jeong ,  Joonhoo Choi

IPC: H01L27/12 ,  G09G3/3266 ,  G09G3/3275 ,  H10K50/11 ,  H10K50/844 ,  H10K59/126 ,  H10K59/131 ,  H10K71/00 ,  H10K77/10 ,  H10K102/00

CPC classification number: H01L27/124 ,  G09G3/3266 ,  G09G3/3275 ,  H01L27/1225 ,  H10K50/11 ,  H10K50/844 ,  H10K59/126 ,  H10K59/131 ,  H10K71/00 ,  H10K77/111 ,  H10K2102/311

Abstract: A display panel includes a base layer including a first area and a second area. At least one inorganic layer disposed on the base layer overlaps the first area and the second area. The at least one inorganic layer comprises a lower opening. A first thin-film transistor is disposed on the at least one inorganic layer. The first thin-film transistor includes a silicon semiconductor pattern. A second thin-film transistor is disposed on the at least one inorganic layer. The second thin-film transistor includes an oxide semiconductor pattern. A plurality of insulation layers overlap the first area and the second area. An upper opening extends from the lower opening. A signal line is electrically connected to the second thin-film transistor. An organic layer is disposed in the lower opening and the upper opening. A light emitting element is disposed on the organic layer.

公开(公告)号：US11997900B2

公开(公告)日：2024-05-28

申请号：US17933470

申请日：2022-09-19

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Kyunghyun Baek ,  Seok Je Seong ,  Hyeonsik Kim ,  Yoonjee Shin ,  Jae Hyun Lee ,  Woo Ho Jeong ,  Yoon-Jong Cho

IPC: H10K59/131 ,  H01L27/12 ,  H01L29/786 ,  H10K59/121 ,  H10K59/124

CPC classification number: H10K59/131 ,  H01L29/78645 ,  H10K59/1213 ,  H10K59/124 ,  H01L27/124 ,  H01L27/1248

Abstract: A display panel includes two or more gate layers including a plurality of gate patterns extending in a first direction and one or more source-drain layers including a plurality of source-drain patterns extending in a second direction crossing the first direction. The gate patterns of the two or more gate layers are curved or bent along a hole surrounding area corresponding to a periphery of a hole in an active area. The source-drain patterns of the one or more source-drain layers are curved or bent along the hole surrounding area. The gate patterns of at least one of the two or more gate layers overlap the source-drain patterns of at least one of the one or more source-drain layers in a thickness direction of the display panel in the hole surrounding area.

公开(公告)号：US11538882B2

公开(公告)日：2022-12-27

申请号：US16997385

申请日：2020-08-19

Applicant: Samsung Display Co., LTD.

Inventor： Yoon-Jong Cho ,  Seok Je Seong ,  Seong Jun Lee

IPC: H01L27/32 ,  G09G3/3233 ,  H01L27/12 ,  H01L29/786 ,  H01L29/04 ,  G09G3/3208 ,  H01L51/52

Abstract: A display device includes a polycrystalline semiconductor including a channel and electrodes of a driving transistor; a gate electrode of the driving transistor on the channel of the driving transistor; a first storage electrode on the gate electrode of the driving transistor; a light blocking layer of a first transistor and a light blocking layer of a second transistor; an oxide semiconductor including a channel and electrodes of the first transistor, and a channel and electrodes of the second transistor; a gate electrode of the first transistor on the channel of the first transistor; and a gate electrode of the second transistor on the channel of the second transistor. The light blocking layer of the first transistor and the first storage electrode are on a same layer, and the light blocking layer of the second transistor and the gate electrode of the driving transistor are on a same layer.

公开(公告)号：US12136631B2

公开(公告)日：2024-11-05

申请号：US18514930

申请日：2023-11-20

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Yoon-Jong Cho ,  Seokje Seong ,  Seongjun Lee ,  Yoonjee Shin ,  Suyeon Yun ,  Wooho Jeong ,  Joonhoo Choi

IPC: H01L27/12 ,  G09G3/3266 ,  G09G3/3275 ,  H10K50/11 ,  H10K50/844 ,  H10K59/126 ,  H10K59/131 ,  H10K71/00 ,  H10K77/10 ,  H10K102/00

Abstract: A display panel includes a base layer including a first area and a second area. At least one inorganic layer disposed on the base layer overlaps the first area and the second area. The at least one inorganic layer comprises a lower opening. A first thin-film transistor is disposed on the at least one inorganic layer. The first thin-film transistor includes a silicon semiconductor pattern. A second thin-film transistor is disposed on the at least one inorganic layer. The second thin-film transistor includes an oxide semiconductor pattern. A plurality of insulation layers overlap the first area and the second area. An upper opening extends from the lower opening. A signal line is electrically connected to the second thin-film transistor. An organic layer is disposed in the lower opening and the upper opening. A light emitting element is disposed on the organic layer.

公开(公告)号：US11997895B2

公开(公告)日：2024-05-28

申请号：US17381579

申请日：2021-07-21

Applicant: Samsung Display Co., Ltd.

Inventor： Changho Yi ,  Sungho Kim ,  Seokje Seong ,  Yoon-Jong Cho ,  Hyeri Cho

IPC: H10K59/131 ,  G02F1/1343 ,  G02F1/1345 ,  G02F1/135 ,  H10K59/12 ,  H10K59/121

CPC classification number: H10K59/131 ,  G02F1/1343 ,  G02F1/134309 ,  G02F1/1345 ,  G02F1/13452 ,  G02F1/13458 ,  G02F1/1357 ,  H10K59/1213 ,  H10K59/1201

Abstract: A display device includes a substrate, a first lower pattern disposed on the substrate, a second lower pattern disposed in a same layer as the first lower pattern and integrally formed with the first lower pattern, an etch stopper disposed on the second lower pattern, a power voltage line disposed on the first lower pattern, and a transfer pattern disposed on the etch stopper, connected to the power voltage line, and contacting the second lower pattern through a contact hole defined through the etch stopper.

公开(公告)号：US11450725B2

公开(公告)日：2022-09-20

申请号：US16844435

申请日：2020-04-09

Applicant: Samsung Display Co., Ltd.

Inventor： Kyunghyun Baek ,  Seok Je Seong ,  Hyeonsik Kim ,  Yoonjee Shin ,  Jae Hyun Lee ,  Woo Ho Jeong ,  Yoon-Jong Cho

IPC: H01L27/32 ,  H01L29/786 ,  H01L27/12

Abstract: A display panel includes two or more gate layers including a plurality of gate patterns extending in a first direction and one or more source-drain layers including a plurality of source-drain patterns extending in a second direction crossing the first direction. The gate patterns of the two or more gate layers are curved or bent along a hole surrounding area corresponding to a periphery of a hole in an active area. The source-drain patterns of the one or more source-drain layers are curved or bent along the hole surrounding area. The gate patterns of at least one of the two or more gate layers overlap the source-drain patterns of at least one of the one or more source-drain layers in a thickness direction of the display panel in the hole surrounding area.

公开(公告)号：US11871624B2

公开(公告)日：2024-01-09

申请号：US17109771

申请日：2020-12-02

Applicant: Samsung Display Co., LTD.

Inventor： Se Wan Son ,  Moo Soon Ko ,  Kyung Hyun Baek ,  Seok Je Seong ,  Jae Hyun Lee ,  Jeong-Soo Lee ,  Ji Seon Lee ,  Yoon-Jong Cho

IPC: H10K59/131 ,  H10K59/124 ,  H10K59/126 ,  G09G3/32

CPC classification number: H10K59/131 ,  H10K59/124 ,  H10K59/126 ,  G09G3/32 ,  G09G2300/0809

Abstract: A display device includes a first semiconductor layer disposed on a substrate; a first insulating layer disposed on the first semiconductor layer; a scan line disposed on the first insulating layer; a second insulating layer on the scan line; an inverted scan line on the second insulating layer; a third insulating layer disposed on the inverted scan line; a second semiconductor layer disposed on the third insulating layer; a fourth insulating layer disposed on the second semiconductor layer; an initializing voltage line disposed on the fourth insulating layer and overlapping the scan line; a first transistor including a channel disposed in the first semiconductor layer and receiving a gate signal through the scan line; and a second transistor including a channel disposed in the second semiconductor layer and receiving a gate signal through the inverted scan line.

公开(公告)号：US10797123B2

公开(公告)日：2020-10-06

申请号：US16115730

申请日：2018-08-29

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Yoon-Jong Cho ,  Suyeon Yun ,  Seokje Seong ,  Seongjun Lee ,  Joonhoo Choi ,  Semyung Kwon ,  Kyunghyun Baek

IPC: H01L51/52 ,  H01L27/32 ,  H01L27/12 ,  G09G3/3225

Abstract: A display panel includes a base layer having a first region and a bent second region. An inorganic layer is disposed on the base layer. A lower opening is formed within the inorganic layer and overlaps the second region. A first thin-film transistor is disposed on the inorganic layer and includes a silicon semiconductor pattern overlapping the first region. A second thin-film transistor is disposed on the inorganic layer and includes an oxide semiconductor pattern overlapping the first region. Insulating layers overlap the first and second regions. An upper opening is formed within the insulating layers. A signal line electrically connects the second thin-film transistor. An organic layer overlaps the first and second regions and is disposed in the lower and upper openings. A luminescent device is disposed on the organic layer and overlaps the first region.

公开(公告)号：US09691982B2

公开(公告)日：2017-06-27

申请号：US14567980

申请日：2014-12-11

Applicant: Samsung Display Co., Ltd.

Inventor： Sang-Jin Park ,  Myung-Ho Kim ,  Jun-Hwan Moon ,  Keun-Chang Lee ,  Yoon-Jong Cho

IPC: H01L51/00 ,  H01L29/49 ,  H01L29/66 ,  H01L27/32

CPC classification number: H01L51/0027 ,  H01L27/3248 ,  H01L29/4908 ,  H01L29/66757 ,  H01L2227/323

Abstract: A method of manufacturing a thin film transistor is disclosed. In one aspect, the method includes forming an active layer over a substrate and forming a gate insulating layer containing a dopant over the active layer. The method also includes irradiating laser light onto the gate insulating layer such that the dopant of the gate insulating layer diffuses into the active layer.

公开(公告)号：US12232371B2

公开(公告)日：2025-02-18

申请号：US18446874

申请日：2023-08-09

Applicant: Samsung Display Co., LTD.

Inventor： Yoon-Jong Cho ,  Seok Je Seong ,  Seong Jun Lee

IPC: H10K59/126 ,  G09G3/3208 ,  G09G3/3233 ,  H01L27/12 ,  H01L29/04 ,  H01L29/786 ,  H10K50/86 ,  H10K59/12 ,  H10K59/121 ,  H10K59/131

Abstract: A display device includes a polycrystalline semiconductor including a channel and electrodes of a driving transistor; a gate electrode of the driving transistor on the channel of the driving transistor; a first storage electrode on the gate electrode of the driving transistor; a light blocking layer of a first transistor and a light blocking layer of a second transistor; an oxide semiconductor including a channel and electrodes of the first transistor, and a channel and electrodes of the second transistor; a gate electrode of the first transistor on the channel of the first transistor; and a gate electrode of the second transistor on the channel of the second transistor. The light blocking layer of the first transistor and the first storage electrode are on a same layer, and the light blocking layer of the second transistor and the gate electrode of the driving transistor are on a same layer.