APPARATUS AND METHOD FOR SCHEDULING IN WIRELESS COMMUNICATION SYSTEM

    公开(公告)号:US20210092753A1

    公开(公告)日:2021-03-25

    申请号:US16961466

    申请日:2019-01-11

    Abstract: The present disclosure relates to a pre-5th-Generation (5G) or 5G communication system to be provided for supporting higher data rates beyond 4th-Generation (4G) communication system such as long term evolution (LTE). A terminal in a wireless communication system is provided. The terminal includes a transceiver, and at least one processor configured to receive, from a base station (BS), a beam failure recovery configuration comprising at least one reference signal for identifying a candidate beam for the beam failure recovery and associated random access (RA) parameters, identify the candidate beam for the beam failure recovery using the at least one reference signal, and perform a physical random access channel (PRACH) using the at least one reference signal and the associated RA parameters on the candidate beam for the beam failure recovery.

    ACCESSORY DEVICE FOR PORTABLE DEVICE
    2.
    发明申请

    公开(公告)号:US20180359343A1

    公开(公告)日:2018-12-13

    申请号:US15780305

    申请日:2016-11-30

    Abstract: An accessory device according to various embodiments comprises: a first housing; a second housing having a first opening and coupled with the first housing; an electrophoretic display unit displaying content through the first opening and having an upper end electrode and a lower end electrode; a printed circuit board on which electronic components including a processor are mounted; and an antenna unit electrically connected with the printed circuit board and receiving data and power from a portable device received by a mounting structure, wherein the lower end electrode and a first surface of the printed circuit board make contact with each other, and an operating voltage for operating the electrophoretic display unit can be supplied through the first surface of the printed circuit board. Various other embodiments are possible.

    IMAGE SENSOR
    3.
    发明申请

    公开(公告)号:US20240429259A1

    公开(公告)日:2024-12-26

    申请号:US18539820

    申请日:2023-12-14

    Abstract: An image sensor includes: a substrate including a first side configured to receive light and a second side that is opposite the first side; a pixel separating pattern configured to at least partially define a unit pixel in the substrate; a first photoelectric conversion layer and a second photoelectric conversion layer arranged in a first direction in the pixel separating pattern; a first separating pattern configured to at least partially define the first photoelectric conversion layer and the second photoelectric conversion layer in the substrate between the first photoelectric conversion layer and the second photoelectric conversion layer; a first grid pattern on the pixel separating pattern; and a second grid pattern on the first separating pattern and having a lower height than the first grid pattern.

    MEMORY DEVICE
    8.
    发明申请

    公开(公告)号:US20220367513A1

    公开(公告)日:2022-11-17

    申请号:US17878304

    申请日:2022-08-01

    Abstract: A memory device includes a substrate; a stacked structure including a plurality of gate layers and a plurality of interlayer insulating layers that are alternately stacked on the substrate in a vertical direction, the stacked structure including a row of cutouts, each of the cutouts extending in a first horizontal direction and being configured to cut the plurality of gate layers, the cutouts being apart from each other and arranged in a cell region of the stacked structure in the first horizontal direction; and a row of channel structures, the channel structures being arranged in the cell region in the first horizontal direction, each of the channel structures extending in the vertical direction to penetrate the plurality of gate layers.

    MEMORY DEVICE
    9.
    发明申请

    公开(公告)号:US20210111188A1

    公开(公告)日:2021-04-15

    申请号:US16895364

    申请日:2020-06-08

    Abstract: A memory device includes a substrate; a stacked structure including a plurality of gate layers and a plurality of interlayer insulating layers that are alternately stacked on the substrate in a vertical direction, the stacked structure including a row of cutouts, each of the cutouts extending in a first horizontal direction and being configured to cut the plurality of gate layers, the cutouts being apart from each other and arranged in a cell region of the stacked structure in the first horizontal direction; and a row of channel structures, the channel structures being arranged in the cell region in the first horizontal direction, each of the channel structures extending in the vertical direction to penetrate the plurality of gate layers.

    VERTICAL NON-VOLATILE MEMORY DEVICE

    公开(公告)号:US20210098479A1

    公开(公告)日:2021-04-01

    申请号:US16893524

    申请日:2020-06-05

    Abstract: A vertical non-volatile memory device includes a stack body including gate patterns and interlayer insulating patterns stacked in a stacking direction, the stack body having a through hole, which extends in the stacking direction, in the gate patterns and in the interlayer insulating patterns; a semiconductor pillar in the through hole and extending in the stacking direction; data storage structures between the gate patterns and the semiconductor pillar in the through hole, the data storage structures including charge storage layers; and dummy charge storage layers on a sidewall of the interlayer insulating patterns toward the semiconductor pillar in the through hole.

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