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    SEMICONDUCTOR DEVICES
    1.
    发明申请
    SEMICONDUCTOR DEVICES 审中-公开
    半导体器件

    公开(公告)号：US20170047344A1

    公开(公告)日：2017-02-16

    申请号：US15334968

    申请日：2016-10-26

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Jae-Duk LEE ,  Young-Woo PARK

    IPC: H01L27/115 ,  H01L23/528 ,  H01L21/28 ,  H01L21/768 ,  H01L21/02

    CPC classification number: H01L21/02636 ,  H01L21/28282 ,  H01L21/76895 ,  H01L23/528 ,  H01L27/11565 ,  H01L27/11568 ,  H01L27/11573 ,  H01L27/11582

    Abstract: A semiconductor device includes a lower insulation layer, a plurality of base layer patterns separated from each other on the lower insulation layer, a separation layer pattern between the base layer patterns, a plurality of channels extending in a vertical direction with respect to top surfaces of the base layer patterns, and a plurality of gate lines surrounding outer sidewalls of the channels, being stacked in the vertical direction and spaced apart from each other.

    Abstract translation: 半导体器件包括下绝缘层，在下绝缘层上彼此分离的多个基底层图案，在基底层图案之间的分离层图案，在垂直方向上延伸的多个通道相对于 基底层图案和围绕通道的外侧壁的多条栅极线在垂直方向上堆叠并彼此间隔开。

    INTEGRATED CIRCUIT DEVICES AND METHODS OF MANUFACTURING THE SAME
    3.
    发明申请
    INTEGRATED CIRCUIT DEVICES AND METHODS OF MANUFACTURING THE SAME 审中-公开

    公开(公告)号：US20200273501A1

    公开(公告)日：2020-08-27

    申请号：US16675273

    申请日：2019-11-06

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Jang-gn YUN ,  Jae-Duk LEE ,  Jai-Hyuk SONG

    IPC: G11C5/06 ,  H01L27/11524 ,  H01L27/11556 ,  H01L27/1157 ,  H01L27/11582 ,  H01L23/522

    Abstract: Integrated circuit devices may include a plurality of word line structures and a plurality of insulating films that are stacked alternately. Sides of the plurality of word line structures and the plurality of insulating films define a side of a channel hole extending through the plurality of word line structures and the plurality of insulating films. The devices may also include a blocking dielectric film on the side of the channel hole, and a plurality of charge storage films on the blocking dielectric film and on the sides of the plurality of word line structures, respectively. Each of the plurality of charge storage films may include a first charge storage film and a second charge storage film sequentially stacked on a respective one of the sides of the plurality of word line structures. A surface of the second charge storage film may include a recess in a middle portion thereof.

    VERTICAL MEMORY DEVICES AND METHODS OF MANUFACTURING THE SAME
    4.
    发明申请
    VERTICAL MEMORY DEVICES AND METHODS OF MANUFACTURING THE SAME 审中-公开

    公开(公告)号：US20190386019A1

    公开(公告)日：2019-12-19

    申请号：US16260368

    申请日：2019-01-29

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Jang-Gn YUN ,  Jae-Duk LEE

    IPC: H01L27/11582 ,  H01L27/11565 ,  H01L29/08 ,  H01L29/423 ,  H01L29/06 ,  H01L21/768 ,  H01L21/28 ,  H01L21/311

    Abstract: A vertical memory device includes a substrate having a trench structure, gate electrodes on the substrate, the gate electrodes being spaced apart from each other in a first direction substantially vertical to an upper surface of the substrate, a channel including a vertical portion extending through the gate electrodes in the first direction, and a horizontal portion extending in the trench structure in a second direction substantially parallel to the upper surface of the substrate, the horizontal portion being connected the vertical portion, and an epitaxial layer on a first portion of the substrate and connected to the horizontal portion of the channel, the first portion of the substrate being adjacent to ends of the gate electrode in the second direction.

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