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公开(公告)号:US20140329476A1
公开(公告)日:2014-11-06
申请号:US14258246
申请日:2014-04-22
Inventor: Shintaro YAMAMICHI , Hirokazu HONDA , Masaki WATANABE , Junichi ARITA , Norio OKADA , Jun UENO , Masashi NISHIMOTO , Michitaka KIMURA , Tomohiro NISHIYAMA
CPC classification number: H04W84/18 , H01L2224/45144 , H01L2224/48091 , H01L2224/49111 , H01L2924/00014 , H01L2924/00
Abstract: A compact electronic device as a constituent element of a wireless communication system using a sensor. A first feature of the device is that a first semiconductor chip is bare-chip-mounted over a front surface of a first wiring board in the form of a chip and a second semiconductor chip is bare-chip-mounted over a second wiring board in the form of a chip. A second feature is that a wireless communication unit and a data processing unit which configure a module are separately mounted. A third feature is that the first and second wiring boards are stacked in the board thickness direction to make up the module (electronic device).
Abstract translation: 作为使用传感器的无线通信系统的组成要素的小型电子设备。 该器件的第一个特征是第一半导体芯片以芯片的形式裸地安装在第一布线板的前表面上,并且第二半导体芯片裸地安装在第二布线板上 芯片的形式。 第二特征是分别安装配置模块的无线通信单元和数据处理单元。 第三特征是第一和第二布线板沿板厚度方向堆叠以组成模块(电子设备)。
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公开(公告)号:US20150118801A1
公开(公告)日:2015-04-30
申请号:US14590804
申请日:2015-01-06
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor: Kozo HARADA , Shinji BABA , Masaki WATANABE , Satoshi YAMADA
CPC classification number: H01L24/81 , H01L21/56 , H01L21/563 , H01L23/3677 , H01L23/49811 , H01L23/49827 , H01L23/49838 , H01L23/50 , H01L24/13 , H01L24/14 , H01L24/16 , H01L2224/13082 , H01L2224/131 , H01L2224/13147 , H01L2224/14152 , H01L2224/14154 , H01L2224/16225 , H01L2224/16227 , H01L2224/16237 , H01L2224/16238 , H01L2224/32225 , H01L2224/73204 , H01L2224/81801 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/15311 , H01L2924/351 , H01L2924/00 , H01L2924/00014 , H01L2924/014
Abstract: To provide a semiconductor device characterized in that lands for mounting thereon solder balls placed in an inner area of a chip mounting area have an NSMD structure. This means that lands for mounting thereon solder balls placed in an area of the back surface of a through-hole wiring board overlapping with a chip mounting area in a plan view have an NSMD structure. According to the invention, a semiconductor device to be mounted on a mounting substrate with balls has improved reliability.
Abstract translation: 为了提供一种半导体器件,其特征在于用于安装在芯片安装区域的内部区域中的焊球上的焊盘具有NSMD结构。 这意味着在平面图中与芯片安装区域重叠的通孔布线板的背面的区域中放置有焊球的焊盘具有NSMD结构。 根据本发明,用球安装在安装基板上的半导体器件具有改进的可靠性。
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公开(公告)号:US20140217582A1
公开(公告)日:2014-08-07
申请号:US14249097
申请日:2014-04-09
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor: Shinji BABA , Toshihiro IWASAKI , Masaki WATANABE
IPC: H01L23/498
CPC classification number: H01L23/49816 , H01L23/49811 , H01L23/49822 , H01L23/49827 , H01L23/49838 , H01L23/50 , H01L25/105 , H01L2224/16225 , H01L2224/32225 , H01L2224/32245 , H01L2224/73204 , H01L2224/73253 , H01L2225/1058 , H01L2924/15311 , H01L2924/15331 , H01L2924/00
Abstract: This invention provides a multi-pin semiconductor device as a low-cost flip-chip BGA. In the flip-chip BGA, a plurality of signal bonding electrodes in a peripheral area of the upper surface of a multilayer wiring substrate are separated into inner and outer ones and a plurality of signal through holes coupled to a plurality of signal wirings drawn inside are located between a plurality of rows of signal bonding electrodes and a central region where a plurality of bonding electrodes for core power supply are located so that the chip pad pitch can be decreased and the cost of the BGA can be reduced without an increase in the number of layers in the multilayer wiring substrate.
Abstract translation: 本发明提供作为低成本倒装芯片BGA的多引脚半导体器件。 在倒装芯片BGA中,多层布线基板的上表面的周边区域中的多个信号接合电极被分离为内部和外部的多个信号接合电极,并且耦合到多个内部的信号布线耦合的多个信号通孔是 位于多行信号键合电极和多个核心电源用接合电极之间的中心区域,使得可以减小芯片焊盘间距,并且能够在不增加数量的情况下降低BGA的成本 的多层布线基板中的层。
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公开(公告)号:US20130299970A1
公开(公告)日:2013-11-14
申请号:US13872012
申请日:2013-04-26
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor: Kozo HARADA , Shinji BABA , Masaki WATANABE , Satoshi YAMADA
IPC: H01L23/498
CPC classification number: H01L24/81 , H01L21/56 , H01L21/563 , H01L23/3677 , H01L23/49811 , H01L23/49827 , H01L23/49838 , H01L23/50 , H01L24/13 , H01L24/14 , H01L24/16 , H01L2224/13082 , H01L2224/131 , H01L2224/13147 , H01L2224/14152 , H01L2224/14154 , H01L2224/16225 , H01L2224/16227 , H01L2224/16237 , H01L2224/16238 , H01L2224/32225 , H01L2224/73204 , H01L2224/81801 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/15311 , H01L2924/351 , H01L2924/00 , H01L2924/00014 , H01L2924/014
Abstract: To provide a semiconductor device characterized in that lands for mounting thereon solder balls placed in an inner area of a chip mounting area have an NSMD structure. This means that lands for mounting thereon solder balls placed in an area of the back surface of a through-hole wiring board overlapping with a chip mounting area in a plan view have an NSMD structure. According to the invention, a semiconductor device to be mounted on a mounting substrate with balls has improved reliability.
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