公开(公告)号：US20240296153A1

公开(公告)日：2024-09-05

申请号：US18177390

申请日：2023-03-02

Applicant: QUALCOMM Incorporated

Inventor： Liang LI ,  Andrew Evan GRUBER ,  Jonnala Gadda NAGENDRA KUMAR ,  Thomas Edwin FRISINGER ,  Zilin YING ,  Srihari Babu ALLA

IPC: G06F16/23 ,  G06F16/22

CPC classification number: G06F16/23 ,  G06F16/2282

Abstract: Aspects of the disclosure are directed to metadata updating. In accordance with one aspect, an apparatus includes an external memory unit configured for storing an original descriptor tag; a descriptor loading block coupled to the external memory, the descriptor loading block configured to fetch the original descriptor tag from the external memory for storage in an internal cache memory and further configured to compare the original descriptor tag stored in the internal cache memory to each of a plurality of original base values; and a remap table database coupled to the descriptor loading block, the remap table database configured to store the plurality of original base values, a plurality of updated base values and a plurality of updated miscellaneous base values.

公开(公告)号：US20240256221A1

公开(公告)日：2024-08-01

申请号：US18162660

申请日：2023-01-31

Applicant: QUALCOMM Incorporated

Inventor： Andrew Evan GRUBER ,  Alexei Vladimirovich BOURD

IPC: G06F7/483

CPC classification number: G06F7/483

Abstract: This disclosure provides systems, devices, apparatus, and methods, including computer programs encoded on storage media, for floating point min/max atomics using integer hardware. A data processor may obtain a first indication of a floating point number associated with a floating point operation. The data processor may select a signed atomic integer operation or an unsigned atomic integer operation based on at least one of the floating point number or the floating point operation, where the signed atomic integer operation is associated with a condition being met and the unsigned atomic integer operation is associated with a failure of the condition to be met.

公开(公告)号：US20240078737A1

公开(公告)日：2024-03-07

申请号：US18320792

申请日：2023-05-19

Applicant: QUALCOMM Incorporated

Inventor： Jian LIANG ,  Andrew Evan GRUBER ,  Tao WANG ,  Xuefeng TANG ,  Vishwanath Shashikant NIKAM ,  Nigel POOLE ,  Kalyan Kumar BHIRAVABHATLA ,  Fei XU ,  Zilin YING

IPC: G06T15/00

CPC classification number: G06T15/005

Abstract: A sliced graphics processing unit (GPU) architecture in processor-based devices is disclosed. In some aspects, a GPU based on a sliced GPU architecture includes multiple hardware slices. The GPU further includes a command processor (CP) circuit and an unslice primitive controller (PC_US). Upon receiving a graphics instruction from a central processing unit (CPU), the CP circuit determines a graphics workload, and transmits the graphics workload to the PC_US. The PC_US then partitions the graphics workload into multiple subbatches and distributes each subbatch to a PC_S of a hardware slice for processing.

公开(公告)号：US20230343016A1

公开(公告)日：2023-10-26

申请号：US18245847

申请日：2020-11-18

Applicant: QUALCOMM Incorporated

Inventor： Srihari Babu ALLA ,  Jonnala Gadda NAGENDRA KUMAR ,  Avinash SEETHARAMAIAH ,  Andrew Evan GRUBER ,  Thomas Edwin FRISINGER ,  Richard HAMMERSTONE ,  Bo DU ,  Yongjun XU

IPC: G06T15/00

CPC classification number: G06T15/005

Abstract: The present disclosure relates to graphics processing. An apparatus of the present disclosure may determine visibility streams corresponding to a target and a set of bins into which the target is divided. The apparatus may select one of a first rendering mode or a second rendering mode for the target based on the first visibility stream and based on the set of second visibility streams. When the first rendering mode is select, the apparatus may configure each of the set of bins into a first subset associated with a first type of rendering pass or a second subset associated with a second type of rendering pass. The apparatus may then render the target based on the selected one of the first rendering mode or the second rendering mode and, if applicable, based on the first rendering pass type or the second rendering pass type.

公开(公告)号：US20230325962A1

公开(公告)日：2023-10-12

申请号：US17658433

申请日：2022-04-07

Applicant: QUALCOMM Incorporated

Inventor： Andrew Evan GRUBER

IPC: G06T1/20 ,  G06T15/00

CPC classification number: G06T1/20 ,  G06T15/005

Abstract: This disclosure provides systems, devices, apparatus, and methods, including computer programs encoded on storage media, for GPU wave-to-wave optimization. A graphics processor may execute a shader program for a first wave associated with a draw call or a compute kernel. The graphics processor may identify at least one first indication for the first wave associated with the draw call or the compute kernel. The graphics processor may store the at least one first indication for the first wave to a memory location. The graphics processor may execute the shader program for at least one second wave associated with the draw call or the compute kernel. The execution of the shader program for the at least one second wave may be based on the shader program for the at least one second wave reading the memory location to retrieve the at least one first indication.

公开(公告)号：US20230290034A1

公开(公告)日：2023-09-14

申请号：US18317825

申请日：2023-05-15

Applicant: QUALCOMM Incorporated

Inventor： Thomas Edwin FRISINGER ,  Richard HAMMERSTONE ,  Andrew Evan GRUBER ,  Gang ZHONG ,  Yun DU ,  Jonnala Gadda NAGENDRA KUMAR

IPC: G06T15/00 ,  G06F9/30 ,  G06T1/20 ,  G06T1/60 ,  G06T15/80

CPC classification number: G06T15/005 ,  G06F9/30101 ,  G06F9/30123 ,  G06T1/20 ,  G06T1/60 ,  G06T15/80

Abstract: This disclosure provides systems, devices, apparatus, and methods, including computer programs encoded on storage media, for fast incremental shared constants. In aspects, a CPU may determine/update shared constant data for a first draw call of a plurality of draw calls. The shared constant data, which may correspond to at least one shader, may be updated based on a draw call update for the first draw call. The CPU may communicate the updated shared constant data for the first draw call to a GPU. The GPU may receive, in at least one register, the updated shared constant data from the CPU and configure the at least one register based on the updated shared constant data corresponding to the draw call update of the first draw call of the plurality of draw calls.

公开(公告)号：US20220122238A1

公开(公告)日：2022-04-21

申请号：US17073218

申请日：2020-10-16

Applicant: QUALCOMM Incorporated

Inventor： Kalyan Kumar BHIRAVABHATLA ,  Krishnaiah GUMMIDIPUDI ,  Ankit Kumar SINGH ,  Andrew Evan GRUBER ,  Pavan Kumar AKKARAJU ,  Srihari Babu ALLA ,  Jonnala Gadda NAGENDRA KUMAR ,  Vishwanath Shashikant NIKAM

IPC: G06T5/40 ,  G06T5/20 ,  G06T7/13 ,  G06T1/20 ,  G06T15/00

Abstract: This disclosure provides systems, devices, apparatus, and methods, including computer programs encoded on storage media, for configurable aprons for expanded binning. Aspects of the present disclosure include identifying one or more pixel tiles in at least one bin and determining edge information for each pixel tile of the one or more pixel tiles. The edge information may be associated with one or more pixels adjacent to each pixel tile. The present disclosure further describes determining whether at least one adjacent bin is visible based on the edge information for each pixel tile, where the at least one adjacent bin may be adjacent to the at least one bin.

公开(公告)号：US20210358076A1

公开(公告)日：2021-11-18

申请号：US16877367

申请日：2020-05-18

Applicant: QUALCOMM Incorporated

Inventor： Andrew Evan GRUBER ,  Yun DU

IPC: G06T1/60 ,  G06T1/20 ,  G06F9/30

Abstract: This disclosure provides systems, devices, apparatus and methods, including computer programs encoded on storage media, for GPR optimization in a GPU based on a GPR release mechanism. More specifically, a GPU may determine at least one unutilized branch within an executable shader based on constants defined for the executable shader. Based on the at least one unutilized branch, the GPU may further determine a number of GPRs that can be deallocated from previously allocated GPRs. The GPU may deallocate, for a subsequent thread within a draw call, the number of GPRs from the previously allocated GPRs during execution of the executable shader based on the determined number of GPRs to be deallocated.

公开(公告)号：US20240104824A1

公开(公告)日：2024-03-28

申请号：US17934869

申请日：2022-09-23

Applicant: QUALCOMM Incorporated

Inventor： Piyush GUPTA ,  Pavan Kumar AKKARAJU ,  Alexei Vladimirovich BOURD ,  Andrew Evan GRUBER

IPC: G06T15/06 ,  G06T17/00 ,  G06T17/10

CPC classification number: G06T15/06 ,  G06T17/005 ,  G06T17/10

Abstract: Systems and techniques are provided for accelerated ray tracing. For instance, a process can include obtaining a hierarchical acceleration data structure that includes a plurality of primitives of a scene object and obtaining a respective information value associated with each primitive included in the plurality of primitives. A sort order can be determined for two or more nodes included in a same level of the hierarchical acceleration data structure at least in part by sorting the two or more nodes based on a respective sorting parameter value determined for each respective node of the two or more nodes. Each respective sorting parameter value can be determined based on at least one information value associated with one or more primitives included in a sub-tree of each respective node of the two or more nodes. The hierarchical acceleration data structure can be traversed using the sort order.

公开(公告)号：US20230298123A1

公开(公告)日：2023-09-21

申请号：US17655358

申请日：2022-03-17

Applicant: QUALCOMM Incorporated

Inventor： Srihari Babu ALLA ,  Tao WANG ,  Andrew Evan GRUBER ,  Matthew NETSCH ,  Richard HAMMERSTONE ,  Thomas Edwin FRISINGER

IPC: G06T1/20 ,  H04N19/182

CPC classification number: G06T1/20 ,  H04N19/182

Abstract: This disclosure provides systems, devices, apparatus, and methods, including computer programs encoded on storage media, for compatible compression for different types of image views. A graphics processor may select a first common format of a plurality of common formats for at least one image based on at least one of application data or first metadata associated with the at least one image. The graphics processor may encode the at least one image based on the selected first common format for the at least one image. The graphics processor may select a second common format for the at least one image based on second metadata of the at least one image. The second common format may be identical to the first common format. The graphics processor may decode the at least one image based on the selected second common format for the at least one image.