公开(公告)号：US20200371712A1

公开(公告)日：2020-11-26

申请号：US16503593

申请日：2019-07-04

Applicant: PHISON ELECTRONICS CORP.

Inventor： Ping-Chuan Lin ,  Yi-Hsuan Lin ,  Bing-Hong Wu

IPC: G06F3/06 ,  G06F12/10

Abstract: A data writing method, a memory storage device, and a memory control circuit unit are provided. The method includes: receiving a first data and writing the first data to at least one first physical programming unit of a first physical erasing unit; receiving a second data; temporarily storing the second data to a temporary storage area if a data length of the second data is less than a predefined value; receiving a third data; writing the third data to at least one second physical programming unit of the first physical erasing unit if a logical address storing the first data is consecutive with a logical address storing the third data; and moving the second data from the temporary storage area to at least one second physical programming unit of the first physical erasing unit if the logical address storing the first data is not consecutive with the logical address storing the third data.

公开(公告)号：US10685735B1

公开(公告)日：2020-06-16

申请号：US16420198

申请日：2019-05-23

Applicant: PHISON ELECTRONICS CORP.

Inventor： Ping-Chuan Lin ,  Shii-Yeu Chern ,  Hsiang-Jui Huang ,  Ping-Yu Hsieh ,  Zih-Jia Wang ,  Yun-You Lin

IPC: G11C29/00 ,  G06F11/18 ,  G06F3/06 ,  G11C16/34

Abstract: The invention provides a memory management method, a memory storage device, and a memory control circuit unit. The method includes: recording an error bit number of each upper physical programming unit and an error bit number of each lower physical programming unit of each of the physical erasing units; determining whether a first physical erasing unit is a bad physical erasing unit according to distributions of the error bit numbers of the upper physical programming units and the lower physical programming units of the first physical erasing unit of the physical erasing units; and performing a data transfer operation on data in the first physical erasing unit if the first physical erasing unit is determined as the bad physical erasing unit.

公开(公告)号：US11467758B2

公开(公告)日：2022-10-11

申请号：US16425942

申请日：2019-05-29

Applicant: PHISON ELECTRONICS CORP.

Inventor： Chieh Yang ,  Yi-Hsuan Lin ,  Tai-Yuan Huang ,  Ping-Chuan Lin

IPC: G06F12/00 ,  G06F3/06 ,  G06F12/02

Abstract: A data writing method, a memory control circuit unit, and a memory storage device are provided. The method includes: receiving a first write command from a host system; selecting a first physical erasing unit from at least one physical erasing unit available for writing and writing data corresponding to the first write command to the first physical erasing unit by using a single page programming mode or a multi-page programming mode when the number of physical erasing units available for writing is greater than a first threshold; and selecting a second physical erasing unit from the at least one physical erasing unit available for writing and writing data corresponding to the first write command into the second physical erasing unit by only using the single page programming mode when the number of physical erasing units available for writing is not greater than the first threshold.

公开(公告)号：US10942680B2

公开(公告)日：2021-03-09

申请号：US16503593

申请日：2019-07-04

Applicant: PHISON ELECTRONICS CORP.

Inventor： Ping-Chuan Lin ,  Yi-Hsuan Lin ,  Bing-Hong Wu

IPC: G06F3/06 ,  G06F12/10

Abstract: A data writing method, a memory storage device, and a memory control circuit unit are provided. The method includes: receiving a first data and writing the first data to at least one first physical programming unit of a first physical erasing unit; receiving a second data; temporarily storing the second data to a temporary storage area if a data length of the second data is less than a predefined value; receiving a third data; writing the third data to at least one second physical programming unit of the first physical erasing unit if a logical address storing the first data is consecutive with a logical address storing the third data; and moving the second data from the temporary storage area to at least one second physical programming unit of the first physical erasing unit if the logical address storing the first data is not consecutive with the logical address storing the third data.

公开(公告)号：US20200210093A1

公开(公告)日：2020-07-02

申请号：US16278172

申请日：2019-02-18

Applicant: PHISON ELECTRONICS CORP.

Inventor： Ping-Chuan Lin ,  Shii-Yeu Chern ,  Tai-Yuan Huang ,  Yi-Hsuan Lin ,  Chi-Shun Kao

IPC: G06F3/06

Abstract: A memory management method, a memory storage device and a memory control circuit unit are provided. The method includes: storing first data to a first physical erasing unit and marking the first physical erasing unit as belonging to a first group, wherein the first data belongs to a first type; storing second data to a second physical erasing unit and marking the second physical erasing unit as belonging to a second group, wherein the second data belongs to a second type which is different from the first type; selecting a third physical erasing unit as an active physical erasing unit and marking the third physical erasing unit as belonging to the first group; when a data moving operation is performed, moving valid data of the first physical erasing unit to the third physical erasing unit according to a first parameter of the first physical erasing unit.

公开(公告)号：US11442662B2

公开(公告)日：2022-09-13

申请号：US16880985

申请日：2020-05-22

Applicant: PHISON ELECTRONICS CORP.

Inventor： Ping-Chuan Lin ,  Hsiang-Jui Huang ,  Ping-Yu Hsieh ,  Tsung-Ju Wu

IPC: G06F3/06

Abstract: A data writing method, a memory control circuit unit, and a memory storage apparatus are provided. The method includes: receiving a write command from a host system; and determining whether to write a data corresponding to the write command into a first area or a second area according to a write amplification factor of the first area, where if it is determined to write the data into the second area, copying the written data to the first area after writing the data.

公开(公告)号：US20210342097A1

公开(公告)日：2021-11-04

申请号：US16880985

申请日：2020-05-22

Applicant: PHISON ELECTRONICS CORP.

Inventor： Ping-Chuan Lin ,  Hsiang-Jui Huang ,  Ping-Yu Hsieh ,  Tsung-Ju Wu

IPC: G06F3/06

Abstract: A data writing method, a memory control circuit unit, and a memory storage apparatus are provided. The method includes: receiving a write command from a host system; and determining whether to write a data corresponding to the write command into a first area or a second area according to a write amplification factor of the first area, where if it is determined to write the data into the second area, copying the written data to the first area after writing the data.

公开(公告)号：US20200341676A1

公开(公告)日：2020-10-29

申请号：US16425942

申请日：2019-05-29

Applicant: PHISON ELECTRONICS CORP.

Inventor： Chieh Yang ,  Yi-Hsuan Lin ,  Tai-Yuan Huang ,  Ping-Chuan Lin

IPC: G06F3/06

Abstract: A data writing method, a memory control circuit unit, and a memory storage device are provided. The method includes: receiving a first write command from a host system; selecting a first physical erasing unit from at least one physical erasing unit available for writing and writing data corresponding to the first write command to the first physical erasing unit by using a single page programming mode or a multi-page programming mode when the number of physical erasing units available for writing is greater than a first threshold; and selecting a second physical erasing unit from the at least one physical erasing unit available for writing and writing data corresponding to the first write command into the second physical erasing unit by only using the single page programming mode when the number of physical erasing units available for writing is not greater than the first threshold;