FAST-SETTLING VOLTAGE REFERENCE GENERATOR FOR SERDES APPLICATIONS

    公开(公告)号:US20190334745A1

    公开(公告)日:2019-10-31

    申请号:US16504958

    申请日:2019-07-08

    Abstract: A reference generator for use with serial link data communication is disclosed. Broadly speaking, a decision circuit may perform a comparison between a particular data symbol included in a serial data stream and a difference between a voltage level of a first signal and a voltage level of a second signal, and generate an output data value based on a result of the comparison. A reference generator circuit may selectively sink a first current value from either the first signal or the second signal based upon another output data value generated from another data symbol included in the serial data stream that was received prior to the particular data symbol.

    Fast-settling voltage reference generator for SERDES applications

    公开(公告)号:US10778478B2

    公开(公告)日:2020-09-15

    申请号:US16504958

    申请日:2019-07-08

    Abstract: A reference generator for use with serial link data communication is disclosed. Broadly speaking, a decision circuit may perform a comparison between a particular data symbol included in a serial data stream and a difference between a voltage level of a first signal and a voltage level of a second signal, and generate an output data value based on a result of the comparison. A reference generator circuit may selectively sink a first current value from either the first signal or the second signal based upon another output data value generated from another data symbol included in the serial data stream that was received prior to the particular data symbol.

    Fast direct feedback circuit for decision feedback equalization correction

    公开(公告)号:US09806918B1

    公开(公告)日:2017-10-31

    申请号:US15181167

    申请日:2016-06-13

    CPC classification number: H04L25/03146 H04L25/028 H04L25/03343

    Abstract: Embodiments include systems and methods for providing fast direct feedback to correct decision feedback equalization (DFE) in receiver circuits. Embodiments can provide direct feedback for DFE correction in a manner that is effective in high-speed data channels, while manifesting less latency, power consumption, and/or area than conventional DFE implementations. In some implementations, in each clock cycle (e.g., Tn), implementations can select (e.g., using a multiplexer) between a positive reference signal and a negative reference signal (e.g., both reference signals generated according to an inter-symbol interference magnitude for a data channel) according to a decision feedback signal from a previous clock cycle (Tn−1). The selected reference signal can be compared (e.g., in the same clock cycle Tn, using a comparator) with an input data signal to generated an updated decision feedback signal for a next clock cycle (e.g., Tn+1).

    Fast-settling voltage reference generator for serdes applications

    公开(公告)号:US10348535B1

    公开(公告)日:2019-07-09

    申请号:US15954072

    申请日:2018-04-16

    Abstract: A reference generator for use with serial link data communication is disclosed. Broadly speaking, a decision circuit may perform a comparison between a particular data symbol included in a serial data stream and a difference between a voltage level of a first signal and a voltage level of a second signal, and generate an output data value based on a result of the comparison. A reference generator circuit may selectively sink a first current value from either the first signal or the second signal based upon another output data value generated from another data symbol included in the serial data stream that was to received prior to the particular data symbol.

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