公开(公告)号：US20230215797A1

公开(公告)日：2023-07-06

申请号：US18076373

申请日：2022-12-06

Applicant: MEDIATEK INC.

Inventor： Hui-Chi Tang ,  Hsuan-Yi Lin ,  Shao-Chun Ho ,  Yi-Wen Chiang ,  Pu-Shan Huang

IPC: H01L23/498 ,  H05K1/11

CPC classification number: H01L23/49838 ,  H01L23/49811 ,  H05K1/111 ,  H05K2201/094

Abstract: A board-level pad pattern includes staggered ball pads disposed within a surface mount region for mounting a multi-row QFN package. The staggered ball pads include first ball pads arranged in a first row and second ball pads arranged in a second row. The first ball pads in the first row are arranged at two different pitches, and the second ball pads in the second row are arranged at a constant pitch.

公开(公告)号：US20230215798A1

公开(公告)日：2023-07-06

申请号：US18078056

申请日：2022-12-08

Applicant: MEDIATEK INC.

Inventor： Hui-Chi Tang ,  Shao-Chun Ho ,  Hsuan-Yi Lin ,  Pu-Shan Huang

IPC: H01L23/498

CPC classification number: H01L23/49838 ,  H01L23/49811 ,  H01L2224/32225 ,  H01L24/32

Abstract: A board-level pad pattern includes a corner pad unit disposed at a corner of a surface mount region for mounting a multi-row QFN package. The corner pad unit includes at least a reversed-L-shaped pad. The reversed-L-shaped pad is disposed in proximity to an apex of the corner of the surface mount region.

公开(公告)号：US09846756B2

公开(公告)日：2017-12-19

申请号：US14843113

申请日：2015-09-02

Applicant: MediaTek Inc

Inventor： Fu-Kang Pan ,  Nan-Cheng Chen ,  Shih-Chieh Lin ,  Hui-Chi Tang ,  Ying Liu ,  Yang Liu ,  Ching-Chih Li

IPC: G06F17/50

CPC classification number: G06F17/5072 ,  G06F17/5068 ,  G06F17/5077 ,  G06F2217/12 ,  G06F2217/38 ,  G06F2217/40

Abstract: A layout method for a printed circuit board (PCB) is provided. The method obtains a memory type of a dynamic random access memory (DRAM) to be mounted on the PCB, obtains a module group from a database according to the memory type of the DRAM, wherein the module group comprises a plurality of routing modules, obtains a plurality of PCB parameters, selects a specific routing module from the module group according to the PCB parameters, and implements the specific routing module into a layout design for PCB fabrication. The specific routing module comprises layout information regarding a main chip, a memory chip and a routing configuration between the main chip and the memory chip.

公开(公告)号：US20240196539A1

公开(公告)日：2024-06-13

申请号：US18533234

申请日：2023-12-08

Applicant: MEDIATEK INC.

Inventor： Chun-Ping Chen ,  Pei-San Chen ,  Hui-Chi Tang

IPC: H05K1/18 ,  H01L23/00 ,  H01L23/498 ,  H01L25/16

CPC classification number: H05K1/183 ,  H01L23/49816 ,  H01L24/13 ,  H01L24/16 ,  H01L25/16 ,  H01L2224/13005 ,  H01L2224/16227 ,  H01L2924/2076 ,  H05K1/021 ,  H05K2201/09072 ,  H05K2201/10015 ,  H05K2201/10378 ,  H05K2201/10515 ,  H05K2201/1053 ,  H05K2201/10734

Abstract: A printed circuit board assembly including a substrate having a first surface and a second surface opposite to the first surface, wherein the substrate has a first thickness; a cavity disposed within a chip module mounting region of the substrate on the first surface that caves in towards the second surface, wherein the chip module mounting region of the substrate has a second thickness, wherein the second thickness is smaller than the first thickness; a plurality of bonding pads in the cavity; and a chip module mounted in the cavity and electrically connected to the substrate through the plurality of bonding pads.

公开(公告)号：US20230217591A1

公开(公告)日：2023-07-06

申请号：US18078022

申请日：2022-12-08

Applicant: MEDIATEK INC.

Inventor： Hui-Chi Tang ,  Shao-Chun Ho ,  Hsuan-Yi Lin ,  Pu-Shan Huang

IPC: H05K1/11

CPC classification number: H05K1/111 ,  H05K1/113 ,  H05K1/114 ,  H05K1/181

Abstract: A board-level pad pattern includes a printed circuit board (PCB) substrate; an exposed pad region disposed within a surface mount region of the base substrate; and multiple staggered ball pads disposed within the surface mount region arranged in a ring shape around the exposed pad region. The staggered ball pads includes first ball pads arranged in a first row and second ball pads arranged in a second row. The first ball pads in the first row are arranged at two different pitches, and the second ball pads in the second row are arranged at a constant pitch. Multiple square-shaped ball pads are arranged in a third row between the exposed pad region and the staggered ball pads.

公开(公告)号：US09158880B2

公开(公告)日：2015-10-13

申请号：US14043197

申请日：2013-10-01

Applicant: MediaTek Inc.

Inventor： Fu-Kang Pan ,  Nan-Cheng Chen ,  Shih-Chieh Lin ,  Hui-Chi Tang ,  Ying Liu ,  Yang Liu

IPC: G06F17/50

CPC classification number: G06F17/5072 ,  G06F17/5068 ,  G06F17/5077 ,  G06F2217/12 ,  G06F2217/38 ,  G06F2217/40

Abstract: A layout method for a printed circuit board (PCB) is provided. A memory type of a dynamic random access memory (DRAM) to be mounted on the PCB is obtained. A module group is obtained from a database according to the memory type of the DRAM, wherein the module group includes a plurality of routing modules. A plurality of PCB parameters are obtained. A specific routing module is selected from the module group according to the PCB parameters. The specific routing module is implemented into a layout design of the PCB. The specific routing module includes layout information regarding a main chip, a memory chip and a routing configuration between the main chip and the memory chip.

Abstract translation: 提供了印刷电路板（PCB）的布局方法。 获得要安装在PCB上的动态随机存取存储器（DRAM）的存储器类型。 根据DRAM的存储器类型从数据库获得模块组，其中模块组包括多个路由模块。 获得多个PCB参数。 根据PCB参数从模块组中选择一个特定的路由模块。 具体的路由模块被实现为PCB的布局设计。 特定路由模块包括关于主芯片，存储芯片以及主芯片和存储芯片之间的路由配置的布局信息。