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公开(公告)号:US09571035B1
公开(公告)日:2017-02-14
申请号:US15044407
申请日:2016-02-16
CPC分类号: H03D7/02 , H03D2200/0013
摘要: An apparatus includes a first circuit and a second circuit. The first circuit may be fabricated in a substrate and generally includes a first diode and a second diode (i) connected as anti-parallel diodes and (ii) physically adjacent to each other in the substrate. The second circuit may be fabricated in the substrate and generally includes a third diode and a fourth diode (i) connected as anti-parallel diodes and (ii) physically adjacent to each other in the substrate. The first circuit and the second circuit may be (a) connected in parallel, (b) physically adjacent to each other in the substrate and (c) configured to mix two input signals to generate an output signal.
摘要翻译: 一种装置包括第一电路和第二电路。 第一电路可以制造在衬底中,并且通常包括作为反并联二极管连接的第一二极管和第二二极管(i)和(ii)在衬底中彼此物理相邻的第二二极管。 第二电路可以制造在衬底中,并且通常包括作为反并联二极管连接的第三二极管和第四二极管(i),和(ii)在衬底中彼此物理相邻。 第一电路和第二电路可以是(a)并联连接,(b)在衬底中彼此物理相邻;以及(c)配置为混合两个输入信号以产生输出信号。
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公开(公告)号:US10211780B2
公开(公告)日:2019-02-19
申请号:US15402445
申请日:2017-01-10
摘要: An apparatus includes a first circuit and a second circuit. The first circuit may have a first diode and a second diode connected as anti-parallel diodes and physically adjacent to each other in a substrate. The second circuit may have a third diode and a fourth diode connected as anti-parallel diodes and physically adjacent to each other in the substrate. The first circuit and the second circuit may be configured to mix two input signals to generate an output signal. A polarity of every other physically neighboring diode may be reversed.
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公开(公告)号:US09741666B1
公开(公告)日:2017-08-22
申请号:US15333433
申请日:2016-10-25
IPC分类号: H01L23/552 , H01L23/66 , H01L23/00 , H01L23/498 , H01L23/31 , H01L21/48 , H01L21/56 , H01L21/66
CPC分类号: H01L23/552 , H01L21/4817 , H01L21/485 , H01L21/4853 , H01L21/56 , H01L22/14 , H01L23/04 , H01L23/053 , H01L23/315 , H01L23/49811 , H01L23/49838 , H01L23/66 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/50 , H01L24/73 , H01L25/0655 , H01L25/50 , H01L2223/6611 , H01L2223/6683 , H01L2224/04042 , H01L2224/45014 , H01L2224/45015 , H01L2224/45124 , H01L2224/45139 , H01L2224/45144 , H01L2224/45147 , H01L2224/45169 , H01L2224/48091 , H01L2224/48139 , H01L2224/48227 , H01L2224/49175 , H01L2224/50 , H01L2224/73265 , H01L2924/00014 , H01L2924/10271 , H01L2924/1032 , H01L2924/10329 , H01L2924/1033 , H01L2924/10335 , H01L2924/10336 , H01L2924/1423 , H01L2924/16152 , H01L2924/1617 , H01L2924/16251 , H01L2924/19107 , H01L2924/3025 , H01L2224/05599 , H01L2224/85399
摘要: An apparatus includes a package, a wall and a lid. The package may be configured to mount two chips configured to generate one or more signals in a millimeter-wave frequency range. The wall may be formed between the two chips. The wall generally has a plurality of conductive arches that attenuate an electromagnetic coupling between the two chips in the millimeter-wave frequency range. The lid may be configured to enclose the chips to form a cavity.
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公开(公告)号:US09508658B1
公开(公告)日:2016-11-29
申请号:US14848777
申请日:2015-09-09
IPC分类号: H01L23/552 , H01L23/66 , H01L23/053 , H01L23/498 , H01L21/48 , H01L25/00 , H01L25/065
CPC分类号: H01L23/552 , H01L21/4817 , H01L21/485 , H01L21/4853 , H01L21/56 , H01L22/14 , H01L23/04 , H01L23/053 , H01L23/315 , H01L23/49811 , H01L23/49838 , H01L23/66 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/50 , H01L24/73 , H01L25/0655 , H01L25/50 , H01L2223/6611 , H01L2223/6683 , H01L2224/04042 , H01L2224/45014 , H01L2224/45015 , H01L2224/45124 , H01L2224/45139 , H01L2224/45144 , H01L2224/45147 , H01L2224/45169 , H01L2224/48091 , H01L2224/48139 , H01L2224/48227 , H01L2224/49175 , H01L2224/50 , H01L2224/73265 , H01L2924/00014 , H01L2924/10271 , H01L2924/1032 , H01L2924/10329 , H01L2924/1033 , H01L2924/10335 , H01L2924/10336 , H01L2924/1423 , H01L2924/16152 , H01L2924/1617 , H01L2924/16251 , H01L2924/19107 , H01L2924/3025 , H01L2224/05599 , H01L2224/85399
摘要: An apparatus having a package, a wall and a lid is disclosed. The package may be configured to mount a plurality of chips. Two of the chips may generate a plurality of signals in a millimeter-wave frequency range. A metal is exposed at a surface of the package between the two chips. The metal is generally connected to an electrical ground. The wall may be formed on the metal and between the two chips. The wall generally has a plurality of arches that (i) are conductive, (ii) are wire bonded to the metal and (iii) attenuate an electromagnetic coupling between the two chips at the millimeter-wave frequency. The lid may be configured to enclose the chips to form a millimeter-wave cavity.
摘要翻译: 公开了一种具有包装,壁和盖的装置。 封装可以被配置成安装多个芯片。 两个芯片可以在毫米波频率范围内产生多个信号。 在两个芯片之间的包装表面露出金属。 金属通常连接到电气接地。 壁可以形成在金属上并且在两个芯片之间。 壁通常具有多个拱形,其(i)是导电的,(ii)引线键合到金属,和(iii)以毫米波频率衰减两个芯片之间的电磁耦合。 盖可以被配置成包围芯片以形成毫米波腔。
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5.
公开(公告)号:US10325850B1
公开(公告)日:2019-06-18
申请号:US15850097
申请日:2017-12-21
IPC分类号: H01L23/528 , H01P3/10 , H01L23/492 , H01L23/66 , H01L23/06 , H01L23/498
摘要: An apparatus includes a laminate and a lid. The laminate generally includes a dielectric layer between a first conductive layer and a second conductive layer. The first conductive layer may include a probe configured to transfer a radio-frequency signal in a millimeter-wave band. The second conductive layer may be configured to provide a continuous ground plane parallel to the probe and separated from the probe by the dielectric layer. A plurality of channels may be (a) formed into a side of the second conductive layer opposite the dielectric layer, (b) formed to a depth less than a thickness of the second conductive layer, and (c) sized to permit gasses formed while securing the laminate to a substrate to escape from between the laminate and the substrate. The lid may be in contact with the first conductive layer.
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6.
公开(公告)号:US09614563B2
公开(公告)日:2017-04-04
申请号:US15194981
申请日:2016-06-28
CPC分类号: H04B1/126 , H03D7/16 , H04B1/06 , H04B1/1036 , H04B1/26 , H04B2001/1072
摘要: An apparatus includes a first receiver frequency conversion stage and a second receiver frequency conversion stage. The first receiver frequency conversion stage may be configured to generate at least four first intermediate frequency signals in response to a radio frequency (RF) input signal and respective phases of a first local oscillator signal. The second receiver frequency conversion stage may be configured to generate at least four output signals in response to the at least four first intermediate frequency signals and one or more phases of a second local oscillator signal. Each of the at least four output signals is generated in an independent channel in response to a respective one of the at least four first intermediate frequency signals and a respective one of the one or more phases of the second local oscillator signal.
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