Abstract:
Provided are a semiconductor device and a method of fabricating the same. The method includes: forming a trench in a semiconductor substrate of a first conductive type; forming a trench dopant containing layer including a dopant of a second conductive type on a sidewall and a bottom surface of the trench; forming a doping region by diffusing the dopant in the trench dopant containing layer into the semiconductor substrate; and removing the trench dopant containing layer.
Abstract:
Provided is an error amplifier. The error amplifier includes: an amplifying unit receiving first and second input signals and amplifying a voltage difference between the received first and second input signals; a first voltage generating unit generating first and second driving voltages for driving the amplifying unit; a second voltage generating unit generating first and second body voltages to implement a body biasing method; a cascode current source including first to fourth PMOS transistors to provide a bias current to the amplifying unit and the first voltage generating unit; and an output unit outputting a signal of the voltage difference amplified by the amplifying unit, wherein the first and third PMOS transistors receive the first body voltage through a body terminal and the second and fourth PMOS transistors receive the second body voltage through a body terminal.
Abstract:
Provided are an ESD protection diode and an electronic device including the same. An ESD protection diode and an electronic device including the same according to an embodiment of the inventive concept include first to fifth wells. The first well is connected to a first voltage terminal. The second well is connected to a second voltage terminal. The third well is connected to the input/output terminal. The fourth well is disposed between the first well and the third well, and the fifth well is disposed between the second well and the third well. The first to third wells are N-type wells, and the fourth and fifth wells are P-type wells. The first well includes a first N+ diffusion region and the second well includes a second N+ diffusion region. The fourth well includes a first P+ diffusion region and the fifth well includes a second P+ diffusion region. According to an embodiment of the inventive concept, an internal circuit is protected fro an ESD pulse applied to a plurality of terminals and holding voltage is increased.
Abstract:
An MEMS microphone is provided which includes a reference voltage/current generator configured to generate a DC reference voltage and a reference current; a first noise filter configured to remove a noise of the DC reference voltage; a voltage booster configured to generate a sensor bias voltage using the DC reference voltage the noise of which is removed; a microphone sensor configured to receive the sensor bias voltage and to generate an output value based on a variation in a sound pressure; a bias circuit configured to receive the reference current to generate a bias voltage; and a signal amplification unit configured to receive the bias voltage and the output value of the microphone sensor to amplify the output value. The first noise filter comprises an impedance circuit; a capacitor circuit connected to a output node of the impedance circuit; and a switch connected to both ends of the impedance circuit.
Abstract:
Provided is an error amplifier. The error amplifier includes: an amplifying unit receiving first and second input signals and amplifying a voltage difference between the received first and second input signals; a first voltage generating unit generating first and second driving voltages for driving the amplifying unit; a second voltage generating unit generating first and second body voltages to implement a body biasing method; a cascode current source including first to fourth PMOS transistors to provide a bias current to the amplifying unit and the first voltage generating unit; and an output unit outputting a signal of the voltage difference amplified by the amplifying unit, wherein the first and third PMOS transistors receive the first body voltage through a body terminal and the second and fourth PMOS transistors receive the second body voltage through a body terminal.
Abstract:
Provided is an acoustic sensor. The acoustic sensor includes: a substrate including sidewall portions and a bottom portion extending from a bottom of the sidewall portions; a lower electrode fixed at the substrate and including a concave portion and a convex portion, the concave portion including a first hole on a middle region of the bottom, the convex portion including a second hole on an edge region of the bottom; diaphragms facing the concave portion of the lower electrode, with a vibration space therebetween; diaphragm supporters provided on the lower electrode at a side of the diaphragm and having a top surface having the same height as the diaphragm; and an acoustic chamber provided in a space between the bottom portion and the sidewall portions below the lower electrode.