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公开(公告)号：US11537016B2
公开(公告)日：2022-12-27
申请号：US16964278
申请日：2019-12-13
Inventor： Leilei Cheng , Jingang Fang , Luke Ding , Jun Liu , Wei Li , Bin Zhou
IPC: G02F1/1333 , G02F1/1362 , H01L21/768 , H01L23/532 , H01L27/12
Abstract: A method of manufacturing an array substrate is provided, which comprises: forming a first metal layer and an insulating layer in sequence on a base substrate, the insulating layer covering the first metal layer; forming an etch barrier layer on the insulating layer; etching the etching barrier layer and the insulating layer multiple times, wherein an effective blocking area of the etching barrier layer decreases successively in each etching to form a connection hole penetrating the insulating layer, the connection hole includes a plurality of via holes connected in sequence, and a slope angle of a hole wall of each via hole is smaller than a preset slope angle; and forming a second metal layer, the second metal layer being connected to the first metal layer through the connection hole.
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公开(公告)号：US11257955B2
公开(公告)日：2022-02-22
申请号：US16026307
申请日：2018-07-03
Inventor： Qinghe Wang , Luke Ding , Leilei Cheng , Jun Bao , Tongshang Su , Dongfang Wang , Guangcai Yuan
IPC: H01L29/786 , H01L27/12 , H01L29/66 , H01L21/02 , H01L29/24 , H01L29/45 , H01L29/49 , H01L21/027 , H01L29/16 , H01L51/00 , H01L51/10
Abstract: The disclosure provides a thin film transistor, an array substrate, and a method for fabricating the same. An embodiment of the disclosure provides a method for fabricating a thin film transistor, the method including: forming a gate, a gate insulation layer, and an active layer above an underlying substrate successively; forming a patterned hydrophobic layer above the active layer, wherein the hydrophobic layer includes first pattern components, and orthographic projections of the first pattern components onto the underlying substrate overlap with a orthographic projection of a channel area at the active layer onto the underlying substrate; and forming a source and a drain above the hydrophobic layer, wherein the source and the drain are located respectively on two sides of a channel area, and in contact with the active layer.
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公开(公告)号：US20200098797A1
公开(公告)日：2020-03-26
申请号：US16399508
申请日：2019-04-30
IPC: H01L27/12 , H01L21/3213 , H01L21/311
Abstract: A display substrate and a method of preparing the same, and a display device are provided, the method including: providing a substrate; forming a switching thin film transistor precursor and a driving thin film transistor precursor on the substrate, each including a semiconductor layer, a gate insulating material layer and a gate metallic layer stacked sequentially above the substrate; forming a photoresist layer above the switching thin film transistor precursor and the driving thin film transistor precursor, and forming an etching mask from the photoresist layer, a first portion of the etching mask at the switching thin film transistor precursor and a second portion of the etching mask at the driving thin film transistor precursor having different shapes; and forming a switching thin film transistor and a driving thin film transistor, by etching processing the switching thin film transistor precursor and the driving thin film transistor precursor with the etching mask.
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公开(公告)号：US20190081178A1
公开(公告)日：2019-03-14
申请号：US16026307
申请日：2018-07-03
Inventor： Qinghe Wang , Luke Ding , Leilei Cheng , Jun Bao , Tongshang Su , Dongfang Wang , Guangcai Yuan
IPC: H01L29/786 , H01L27/12 , H01L29/66 , H01L21/027 , H01L21/02 , H01L29/24 , H01L29/45 , H01L29/49
Abstract: The disclosure provides a thin film transistor, an array substrate, and a method for fabricating the same. An embodiment of the disclosure provides a method for fabricating a thin film transistor, the method including: forming a gate, a gate insulation layer, and an active layer above an underlying substrate successively; forming a patterned hydrophobic layer above the active layer, wherein the hydrophobic layer includes first pattern components, and orthographic projections of the first pattern components onto the underlying substrate overlap with a orthographic projection of a channel area at the active layer onto the underlying substrate; and forming a source and a drain above the hydrophobic layer, wherein the source and the drain are located respectively on two sides of a channel area, and in contact with the active layer.
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公开(公告)号：US11559592B2
公开(公告)日：2023-01-24
申请号：US16442860
申请日：2019-06-17
Inventor： Guangyao Li , Luke Ding , Leilei Cheng , Yingbin Hu , Jingang Fang , Ning Liu , Qinghe Wang , Dongfang Wang , Liangchen Yan
IPC: A61L2/03 , C01B32/182
Abstract: A sterilization structure, a sterilization board, and a display device are disclosed. The sterilization structure includes an active layer, wherein, one surface of the active layer has an exposed region, and a material of the active layer includes a laser-induced graphene material.
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Patent Agency Ranking
公开(公告)号：US10777683B2
公开(公告)日：2020-09-15
申请号：US16403860
申请日：2019-05-06
Inventor： Yang Zhang , Luke Ding , Bin Zhou , Haitao Wang , Ning Liu , Jingang Fang , Yongchao Huang , Liangchen Yan
IPC: H01L29/786 , H01L27/12 , H01L29/66 , H01L27/32
Abstract: A thin film transistor, a method of manufacturing the same, an array substrate and a display panel are disclosed. The thin film transistor includes a light blocking layer, an electrode layer, and a combination layer, which are sequentially stacked. The electrode layer includes a gate electrode, a source electrode and a drain electrode which are separated from one another, and the gate electrode is located between the source electrode and the drain electrode. The light blocking layer includes a first portion of which an orthogonal projection is located between an orthogonal projection of the gate electrode and an orthogonal projection of the source electrode; and a second portion of which an orthogonal projection is located between the orthogonal projection of the gate and an orthogonal projection of the drain. The combination layer includes an active layer.
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公开(公告)号：US09818940B2
公开(公告)日：2017-11-14
申请号：US15223465
申请日：2016-07-29
Inventor： Leilei Cheng , Dongfang Wang , Yongchao Huang , Bin Zhou , Luke Ding , Min He
CPC classification number: H01L51/0012 , H01L27/3244 , H01L51/0016 , H01L51/5253 , H01L51/56 , H01L2227/323
Abstract: A method for fabricating an Organic Light-Emitting Diode (OLED) display panel is provided. The method includes arranging Thin-Film Transistor (TFT) devices on one side of a substrate and a function layer on the other side of the substrate to form a laminate including both the TFT devices and the function layer, attaching the laminate onto a loading platform such that the function layer included in the laminate faces towards the loading platform, and conducting a process on the laminate to form an organic electroluminescent material layer on surfaces of the TFT devices.
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8.发明授权Thin film transistor and method of fabricating the same, array substrate and method of fabricating the same, and display device 有权薄膜晶体管及其制造方法，阵列基板及其制造方法以及显示装置公开(公告)号：US09455324B2
公开(公告)日：2016-09-27
申请号：US14376028
申请日：2013-11-27
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Zhanfeng Cao , Qi Yao , Luke Ding , Bing Sun , Xiangchun Kong
IPC: H01L29/423 , H01L27/12 , H01L29/51 , G02F1/1368 , H01L29/49 , H01L29/786
CPC classification number: H01L29/42364 , G02F1/1368 , H01L27/1225 , H01L27/124 , H01L29/4908 , H01L29/517 , H01L29/78606 , H01L29/7869 , H01L2029/42388
Abstract: The present invention provides a thin film transistor and a method of fabricating the thin film transistor, an array substrate and a method of fabricating the array substrate, and a display device. The thin film transistor includes a substrate and a gate, an insulation layer, an active layer, a source and a drain which are provided on the substrate. A spacer layer is also provided between the gate and the active layer, and the spacer layer overlaps at least with one of the gate and the active layer having a smaller area in an orthographic projection direction. The spacer layer can effectively prevent material forming the gate from being diffused into the active layer, thereby ensuring stability of performance of the thin film transistor. In the array substrate utilizing the thin film transistor, the spacer layer further extends to a region corresponding to a gate line.
Abstract translation: 本发明提供一种薄膜晶体管和制造薄膜晶体管的方法，阵列基板和制造阵列基板的方法以及显示装置。 薄膜晶体管包括设置在基板上的基板和栅极，绝缘层，有源层，源极和漏极。 间隔层还设置在栅极和有源层之间，并且间隔层至少与栅极和有源层中的一个重叠，在正投影方向上具有较小的面积。 间隔层可以有效地防止形成栅极的材料扩散到有源层中，从而确保薄膜晶体管的性能的稳定性。 在利用薄膜晶体管的阵列基板中，间隔层进一步延伸到对应于栅极线的区域。
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公开(公告)号：US20250098446A1
公开(公告)日：2025-03-20
申请号：US18558247
申请日：2022-10-28
Inventor： Can Yuan , Liu Wu , Zhidong Yuan , Luke Ding , Yongqian Li , Cheng Xu , Dandan Zhou , Dacheng Zhang
IPC: H10K59/131 , G09G3/3225
Abstract: A display substrate and driving method thereof, a display device are provided. The display substrate includes: a base substrate, and a plurality of repeating units and a plurality of data lines on the base substrate, the plurality of repeating units are divided into plurality of repeating unit columns; each repeating unit includes a plurality of subpixels, the subpixel includes a subpixel driving circuit, the subpixel driving circuit includes a data writing transistor, a writing control transistor and a driving transistor; the first electrode of the data writing transistor is coupled to the corresponding data line, the second electrode of the data writing transistor is coupled to the first electrode of the writing control transistor, and the second electrode of the writing control transistor is coupled to the gate of the driving transistor.
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公开(公告)号：US12230210B2
公开(公告)日：2025-02-18
申请号：US18547182
申请日：2022-09-30
Inventor： Liu Wu , Can Yuan , Zhidong Yuan , Cheng Xu , Luke Ding , Yongqian Li , Xiuting Liu
IPC: G09G3/3233 , H10K59/131
Abstract: A display substrate, including: a plurality of partition control signal lines disposed on a base substrate; and a plurality of sub-pixels disposed on the base substrate, at least one of the sub-pixels includes a pixel circuit and a light emitting device. The pixel circuit includes a switch transistor, a first partition control transistor, a drive transistor and a first initialization transistor. The first partition control transistor is electrically connected to the switch transistor, the first initialization transistor, the drive transistor and at least one partition control signal line. The first partition control transistor is configured to: in response to a partition control signal on the partition control signal line, selectively transmit a received first initialization signal to a gate electrode of the drive transistor in an initialization phase, and selectively transmit a received data signal to the gate electrode of the drive transistor in a data writing phase.
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