Abstract:
The disclosure provides a display panel, a manufacturing method thereof, and a display device, which belong to the field of display technology. The display panel includes a plurality of display islands (SPXL) and a plurality of deformable bridging units (SBRI); the plurality of display islands (SPXL) are separated from each other; and two adjacent display islands (SPXL) are connected by the bridging units (SBRI); the display island (SPXL) has at least one display unit (Upxl); and the bridging unit (SBRI) has an external signal wiring electrically connected to the display unit (Upxl).
Abstract:
The disclosure relates to a display panel and a display apparatus. The display panel comprises: a substrate comprising a substrate display region corresponding to a display panel display region and a substrate non-display region corresponding to a display panel non-display region; a non-display region circuit located at the substrate non-display region; and a packaging layer located on the non-display region circuit and having at least a partial overlap area with the non-display region circuit, wherein the non-display region circuit comprises: a first conductive pattern; at least one buffer layer located at a side of the first conductive pattern close to the substrate; at least one gate insulating layer configured to electrically insulate the first conductive pattern and other conductive patterns; and at least one interlayer insulating layer located at a side of the first conductive pattern away from the substrate.
Abstract:
Provided is a display apparatus including a display panel, a timing controller, a source driver and a gate driver. The display apparatus is divided into a first region and a second region along a centerline. The timing controller includes a first timing connector and a second timing connector, which are located in the same region with the gate driver, and the first timing connector is located on a side of the second timing connector close to the gate driver. The first timing connector is configured to transmit a first signal, which includes a first power supply signal configured to supply power to the gate driver and a first control signal configured to control the gate driver to output a scan signal. The second timing connector is configured to transmit a second signal, which includes a second control signal configured to control the source driver to output a data signal.
Abstract:
The present disclosure provides a display substrate, a manufacturing method thereof and a display device. The display substrate includes a base substrate, including a hollowed-out region, an island and a connection bridge; a plurality of display units; and a source/drain metal pattern, including patterns of a plurality of signal lines. On the island, a plurality of inorganic film layers is arranged between the base substrate and the source/drain metal pattern, and the plurality of inorganic film layers includes a first inorganic film layer arranged at a side furthest away from the base substrate. On the connection bridge, at least one first organic film layer is arranged between the base substrate and the source/drain metal pattern.
Abstract:
The present application provides a display substrate and a display device. The display substrate comprises: a base substrate, wherein the base substrate has stretching areas and a plurality of display areas, the plurality of display areas are spaced apart from each other by the stretching areas, the stretching area has first connection units connecting two adjacent display areas and a hollow part jointly defined by a plurality of the first connection units; and light emitting elements, wherein the light-emitting elements are arranged on one side of the base substrate, and the stretching areas and the display areas both have the light-emitting elements.
Abstract:
A light source and a lighting device are provided. The light source includes a light emitting element configured to emit light and a light transmittance adjustment layer located on a light emitting surface of the light emitting element, and light transmittance of the light transmittance adjustment layer is adjustable.
Abstract:
An array substrate including: a base substrate and a thin film transistor unit provided on the base substrate; the thin film transistor unit comprises: a first gate electrode provided on the base substrate, a gate insulating layer provided on the first gate electrode, a source electrode disposed in a same layer as the first gate electrode, an active layer provided on the source electrode, a drain electrode provided on the active layer, and the gate insulating layer disposed between the first gate electrode and the source electrode. This array substrate reduces a channel length of a conducting channel of the thin film transistor unit, and meanwhile increases an aperture ratio of a pixel.
Abstract:
A display panel includes: a plurality of first strip-shaped circuit boards extending in a first direction, a plurality of second strip-shaped circuit boards extending in the second direction, a plurality of pixel units, a plurality of first braided lines and a plurality of second braided lines. The plurality of second strip-shaped circuit boards and the plurality of first strip-shaped circuit boards are arranged in a cross way. A pixel unit is located at an intersection position between a second strip-shaped circuit board and a first strip-shaped circuit board, and is electrically connected to both the first strip-shaped circuit board and the second strip-shaped circuit board that cross at the intersection position. The plurality of first braided lines and the plurality of second braided lines are connected with the plurality of first strip-shaped circuit boards and the plurality of second strip-shaped circuit boards in a braiding way.
Abstract:
A display substrate includes: a base substrate including a plurality of islands, a plurality of connection bridges, a plurality of display units each including a first electrode, a second electrode and an electroluminescent layer and an electrical connection unit including a plurality of signal lines arranged on the connection bridges. At least one annular electrode is further arranged on each island. The annular electrode includes a first region and a second region. A line width of the annular electrode in the first region is larger than a line width the annular electrode in the second region, or the second region is a hollowed-out region.
Abstract:
An oxide thin film transistor, an array substrate, methods of manufacturing the same and a display device are disclosed. The oxide thin film transistor includes: a base substrate; and a gate electrode, a gate insulating layer, an oxide active layer, drain/source electrodes sequentially disposed on the base substrate. The oxide TFT transistor further includes an ultraviolet barrier layer disposed on the oxide active layer, the ultraviolet barrier layer is made of a resin material contains an ultraviolet absorbent. The stability of the oxide TFT is enhanced by disposing the ultraviolet barrier layer over the oxide active layer of the oxide TFT, since the ultraviolet barrier layer blocks the impact of UV light on the oxide TFT.