Abstract:
A near field communication (NFC) transceiver contains a transmitter portion to generate a transmit wireless signal, and a receiver portion to receive and process a receive wireless signal. The circuit further contains a shunt capacitor, a switch, and an antenna interface to couple the transmitter portion and the receiver portion to an antenna designed to communicate with external antennas by inductive coupling. The switch couples the shunt capacitor in parallel with the antenna in one operational mode, and decouples the shunt capacitor from the antenna in another operational mode. Transmit and receive performance of the NFC transceiver are enhanced as a result.
Abstract:
A single-antenna solution is provided for near-field and far-field communication in wireless devices. In an embodiment, a first transceiver block generates a first transmit signal to be transmitted using radiative techniques. A second transceiver block generates a second transmit signal to be transmitted using inductive coupling. The first and second transceiver blocks are coupled to a same antenna for transmitting the first transmit signal using radiative coupling, and the second transmit signal using inductive coupling. The first transceiver block and the second transceiver block operate according to time division multiplexing, and in an embodiment corresponding to an FM transceiver and an NFC transceiver.
Abstract:
A near field communication (NFC) transceiver contains a transmitter portion to generate a transmit wireless signal, and a receiver portion to receive and process a receive wireless signal. The circuit further contains a shunt capacitor, a switch, and an antenna interface to couple the transmitter portion and the receiver portion to an antenna designed to communicate with external antennas by inductive coupling. The switch couples the shunt capacitor in parallel with the antenna in one operational mode, and decouples the shunt capacitor from the antenna in another operational mode. Transmit and receive performance of the NFC transceiver are enhanced as a result.
Abstract:
A switched power amplifier contained in a circuit is implemented to receive a single-ended input signal and generate a single-ended output signal, the single-ended output signal being a power-amplified version of the single-ended input signal. The switched power amplifier provides high efficiency.
Abstract:
An electronic circuit comprising a transistor-based RF (radio frequency) power amplifier (112) having balanced outputs (172, 176), a transistor-based receiver RF amplifier (116) having balanced inputs (152, 156) ohmically connected to said balanced outputs (172, 176) respectively of said RF power amplifier (112), and a balun (114) having a primary (182, 186) and a secondary (188), said primary (182, 186) having primary connections and a supply connection (185) of said primary (182, 186) intermediate said primary connections and said primary connections ohmically connected both to said balanced outputs (172, 176) of said RF power amplifier (112) respectively and to said balanced inputs (152, 156) of said receiver RF amplifier, thereby to switchlessly couple RF between the balun (114) and the RF power amplifier (112) and switchlessly couple RF between the balun (114) and the receiver RF amplifier (116). Other electronic circuits, processes, devices and systems are disclosed.
Abstract:
A single-antenna solution is provided for near-field and far-field communication in wireless devices. In an embodiment, a first transceiver block generates a first transmit signal to be transmitted using radiative techniques. A second transceiver block generates a second transmit signal to be transmitted using inductive coupling. The first and second transceiver blocks are coupled to a same antenna for transmitting the first transmit signal using radiative coupling, and the second transmit signal using inductive coupling. The first transceiver block and the second transceiver block operate according to time division multiplexing, and in an embodiment corresponding to an FM transceiver and an NFC transceiver.
Abstract:
A switched power amplifier contained in a circuit is implemented to receive a single-ended input signal and generate a single-ended output signal, the single-ended output signal being a power-amplified version of the single-ended input signal. The switched power amplifier provides high efficiency.
Abstract:
According to an aspect of the present invention, the magnitude and phase angle of looking-in impedance driven by an amplifier are computed in digital domain during normal operation within a module containing the amplifier. In an embodiment, the computed magnitude and phase angle are used for impedance matching at a node driven by the amplifier. As a result, impedance matching may be obtained even in situations when the impedance changes during operation.
Abstract:
An offset correction circuit which enables a designer to control the correction range irrespective of the amplification sought to be achieved to the image component of the input signal. The offset correction further enables the designer to perform offset correction to a low resolution. Both range and resolution can potentially be attained using only two stages thereby minimizing power consumption and also minimizing introduction of any undesirable components.
Abstract:
An amplifier, preferably an integrated circuit, capable of accepting input common mode voltages below the circuit reference voltage or substrate voltage in the case of an integrated circuit. The amplifier comprises a differential voltage input having higher and lower voltage terminals, a first NMOS transistor coupled between a voltage supply and the higher voltage terminal and a second NMOS transistor coupled between the voltage supply and the lower voltage terminal. A third NMOS transistor is coupled between the voltage supply and the first transistor gate, a fourth NMOS transistor is coupled between the voltage supply and the second transistor gate and a sink resistor is coupled between the gate of the second transistor and the lower voltage terminal. A differential resistor is coupled between the gates of the first and second transistors. The first and second transistors include a source and a backgate coupled to each other and electrically isolated from the substrate with the source of each of the first and second transistors being coupled to a different one of the input terminals. The third and fourth transistors include a source and a backgate coupled to each other and electrically isolated from the substrate with the source of each of the third and fourth transistors coupled to opposite ends of the differential resistor. The circuit further includes a PMOS mirror circuit for providing an output.