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    CHIP STACK WITH CONDUCTIVE COLUMN THROUGH ELECTRICALLY INSULATED SEMICONDUCTOR REGION
    1.
    发明申请
    CHIP STACK WITH CONDUCTIVE COLUMN THROUGH ELECTRICALLY INSULATED SEMICONDUCTOR REGION 有权
    具有通过电绝缘半导体区域导电柱的芯片堆叠

    公开(公告)号：US20110309521A1

    公开(公告)日：2011-12-22

    申请号：US13219328

    申请日：2011-08-26

    申请人： Brendan Dunne

    发明人： Brendan Dunne

    IPC分类号： H01L23/48

    CPC分类号： H01L21/76898 ,  H01L23/481 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/16 ,  H01L2224/48091 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/00014

    摘要： A method for stacking and interconnecting integrated circuits includes providing at least two substrates; forming a trench in each substrate; filling the trench with an insulating material; forming, in each substrate, at least one conductive area; thinning each substrate until reaching at least the bottom of the trench, to obtain in each substrate at least one electrically insulated region within the closed perimeter delineated by the trench; bonding the substrates together; making at least one hole through the bonded substrates so that the hole passes at least partially through the conductive areas and passes through the insulated region of each substrate; and filling the hole with an electrically conductive material so as to obtain a conductive column that traverses the isolated region of each substrate and is in lateral electrical contact with the conductive areas.

    摘要翻译： 集成电路的堆叠和互连的方法包括提供至少两个基板; 在每个衬底中形成沟槽; 用绝缘材料填充沟槽; 在每个衬底中形成至少一个导电区域; 使每个衬底细化，直到到达沟槽的至少底部，以在每个衬底中获得由沟槽划定的闭合周边内的至少一个电绝缘区域; 将基板粘合在一起; 使至少一个孔穿过所述接合的基板，使得所述孔至少部分地穿过所述导电区域并穿过每个基板的绝缘区域; 并用导电材料填充孔，以便获得穿过每个基板的隔离区域并与导电区域侧向电接触的导电柱。

    METHOD FOR STACKING AND INTERCONNECTING INTEGRATED CIRCUITS
    2.
    发明申请
    METHOD FOR STACKING AND INTERCONNECTING INTEGRATED CIRCUITS 有权
    堆叠和互连集成电路的方法

    公开(公告)号：US20100133645A1

    公开(公告)日：2010-06-03

    申请号：US12625196

    申请日：2009-11-24

    申请人： Brendan Dunne

    发明人： Brendan Dunne

    IPC分类号： H01L29/06 ,  H01L21/98

    CPC分类号： H01L21/76898 ,  H01L23/481 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/16 ,  H01L2224/48091 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/00014

    摘要： A method for stacking and interconnecting integrated circuits includes providing at least two substrates; forming a trench in each substrate; filling the trench with an insulating material; forming, in each substrate, at least one conductive area; thinning each substrate until reaching at least the bottom of the trench, to obtain in each substrate at least one electrically insulated region within the closed perimeter delineated by the trench; bonding the substrates together; making at least one hole through the bonded substrates so that the hole passes at least partially through the conductive areas and passes through the insulated region of each substrate; and filling the hole with an electrically conductive material so as to obtain a conductive column that traverses the isolated region of each substrate and is in lateral electrical contact with the conductive areas.

    摘要翻译： 集成电路的堆叠和互连的方法包括提供至少两个基板; 在每个衬底中形成沟槽; 用绝缘材料填充沟槽; 在每个衬底中形成至少一个导电区域; 使每个衬底细化，直到到达沟槽的至少底部，以在每个衬底中获得由沟槽划定的闭合周边内的至少一个电绝缘区域; 将基板粘合在一起; 使至少一个孔穿过所述接合的基板，使得所述孔至少部分地穿过所述导电区域并穿过每个基板的绝缘区域; 并用导电材料填充孔，以便获得穿过每个基板的隔离区域并与导电区域侧向电接触的导电柱。

    CMOS IMAGING DEVICE COMPRISING A MICROLENS ARRAY EXHIBITING A HIGH FILLING RATE
    3.
    发明申请
    CMOS IMAGING DEVICE COMPRISING A MICROLENS ARRAY EXHIBITING A HIGH FILLING RATE 有权
    包含微阵列的CMOS成像装置展现高填充率

    公开(公告)号：US20080290383A1

    公开(公告)日：2008-11-27

    申请号：US12129096

    申请日：2008-05-29

    申请人： Brendan Dunne ,  Caroline Fossati ,  Olivier Gagliano

    发明人： Brendan Dunne ,  Caroline Fossati ,  Olivier Gagliano

    IPC分类号： H01L31/00 ,  H01L21/00

    CPC分类号： G02B3/0018 ,  G02B3/0056 ,  H01L27/14627 ,  H01L27/14643 ,  H01L27/14685

    摘要： A CMOS imager includes a photosite array and a microlens array. The microlens array comprises microlenses of a first type and microlenses of a second type, the microlenses of first type being manufactured according to a first circular template having a first radius, the microlenses of second type being manufactured according to a second circular template having a second radius inferior to the first radius, and the first and second templates having overlap areas. One advantage is that the CMOS imager has a high fill rate.

    摘要翻译： CMOS成像器包括光子阵列和微透镜阵列。 微透镜阵列包括第一类型的微透镜和第二类型的微透镜，第一类型的微透镜根据具有第一半径的第一圆形模板制造，第二类型的微透镜根据具有第二类型的第二圆形模板制造， 半径低于第一半径，第一和第二模板具有重叠区域。 一个优点是CMOS成像器具有高填充率。

    Method for stacking and interconnecting integrated circuits
    4.
    发明授权
    Method for stacking and interconnecting integrated circuits 有权
    堆叠和互连集成电路的方法

    公开(公告)号：US08034713B2

    公开(公告)日：2011-10-11

    申请号：US12625196

    申请日：2009-11-24

    申请人： Brendan Dunne

    发明人： Brendan Dunne

    IPC分类号： H01L21/44

    CPC分类号： H01L21/76898 ,  H01L23/481 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/16 ,  H01L2224/48091 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/00014

    摘要： A method for stacking and interconnecting integrated circuits includes providing at least two substrates; forming a trench in each substrate; filling the trench with an insulating material; forming, in each substrate, at least one conductive area; thinning each substrate until reaching at least the bottom of the trench, to obtain in each substrate at least one electrically insulated region within the closed perimeter delineated by the trench; bonding the substrates together; making at least one hole through the bonded substrates so that the hole passes at least partially through the conductive areas and passes through the insulated region of each substrate; and filling the hole with an electrically conductive material so as to obtain a conductive column that traverses the isolated region of each substrate and is in lateral electrical contact with the conductive areas.

    摘要翻译： 集成电路的堆叠和互连的方法包括提供至少两个基板; 在每个衬底中形成沟槽; 用绝缘材料填充沟槽; 在每个衬底中形成至少一个导电区域; 使每个衬底细化，直到到达沟槽的至少底部，以在每个衬底中获得由沟槽划定的闭合周边内的至少一个电绝缘区域; 将基板粘合在一起; 使至少一个孔穿过所述接合的基板，使得所述孔至少部分地穿过所述导电区域并穿过每个基板的绝缘区域; 并用导电材料填充孔，以便获得穿过每个基板的隔离区域并与导电区域侧向电接触的导电柱。

    MANUFACTURE OF PHOTOVOLTAIC MODULE COMPRISING CELL ASSEMBLY
    6.
    发明申请
    MANUFACTURE OF PHOTOVOLTAIC MODULE COMPRISING CELL ASSEMBLY 审中-公开
    包含电池组件的光伏组件的制造

    公开(公告)号：US20130023068A1

    公开(公告)日：2013-01-24

    申请号：US13637057

    申请日：2011-03-24

    申请人： Brendan Dunne

    发明人： Brendan Dunne

    IPC分类号： H01L31/0203

    CPC分类号： H01L31/02008 ,  H01L31/03928 ,  H01L31/0463 ,  H01L31/0465 ,  H01L31/048 ,  H01L31/0504 ,  H01L31/18 ,  Y02E10/541 ,  Y02P70/521

    摘要： The present invention relates to the manufacture of a photovoltaic cell panel, said manufacture comprising the steps of: a) obtaining photovoltaic (PV) films that are each intended for a cell and are placed onto a front surface of a metal substrate; b) applying at least one conductive film (CG, CND) onto each front surface of a photovoltaic film; c) cutting up the substrate (SUB) so as to isolate the cells from each other; and d) encapsulating (ENC) the cells on a common mounting. According to the invention, steps d) and c) are reversed, so step d) relates to encapsulating the front surface of the substrate before step c), cutting the substrate up by the rear surface thereof. Additionally,—in step b), an area of the conductive film is extended over the substrate so that the conductive film simultaneously makes contact with the front surface of the photovoltaic film and the front surface of the substrate, and—in step c), the substrate is cut up so as to avoid short-circuiting between the photovoltaic cells, at least under the above-mentioned area of the conductive film and over a substrate width less than the width of the area.

    摘要翻译： 本发明涉及光伏电池板的制造，所述制造方法包括以下步骤：a）获得各自用于电池并放置在金属基板前表面上的光伏（PV）膜; b）将至少一个导电膜（CG，CND）施加到光伏膜的每个前表面上; c）切割衬底（SUB）以使细胞彼此隔离; 和d）将细胞封装（ENC）在共同的安装上。 根据本发明，步骤d）和c）相反，因此步骤d）涉及在步骤c）之前封装衬底的前表面，将衬底的后表面向上切割。 此外，在步骤b）中，导电膜的面积延伸到基板上，使得导电膜同时与光致薄膜的前表面和基板的前表面接触，并且在步骤c）中， 切割基板以避免至少在导电膜的上述区域和小于该区域的宽度的基板宽度上的光伏电池之间的短路。

    METHOD OF MANUFACTURING AN IMAGE SENSING MICROMODULE
    8.
    发明申请
    METHOD OF MANUFACTURING AN IMAGE SENSING MICROMODULE 有权
    制造图像感测显微镜的方法

    公开(公告)号：US20090267172A1

    公开(公告)日：2009-10-29

    申请号：US12254672

    申请日：2008-10-20

    申请人： Brendan Dunne ,  Kevin Channon ,  Eric Christison ,  Robert Nicol

    发明人： Brendan Dunne ,  Kevin Channon ,  Eric Christison ,  Robert Nicol

    IPC分类号： H01L31/02 ,  H01L21/50 ,  H01L23/02

    CPC分类号： H01L27/14618 ,  H01L27/14636 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A method of manufacturing a micromodule including the steps of: producing an integrated circuit on an active face of a chip made of a semi-conductive material, making a via passing through the chip, electrically linked to the integrated circuit, and inserting the chip into a box comprising a cavity and an electrically conductive element, the active face of the chip being disposed towards the bottom of the cavity, forming on at least one part of a lateral face of the chip a conductive lateral layer made of an electrically conductive material, electrically linked to a conductive element of the rear face of the chip, and producing a connection between the conductive lateral layer and the conductive element by depositing an electrically conductive material in the cavity.

    摘要翻译： 一种制造微型组件的方法，包括以下步骤：在由半导体材料制成的芯片的有源面上制造集成电路，使通过芯片的通孔电连接到集成电路，并将芯片插入 包括空腔和导电元件的盒子，所述芯片的有源面朝向所述空腔的底部设置，在所述芯片的侧面的至少一部分上形成由导电材料制成的导电横向层， 电连接到芯片的后表面的导电元件，并且通过在空腔中沉积导电材料而在导电横向层和导电元件之间产生连接。

    Process for protection of the surface of a fixed contact for a semiconductor color image sensor cell during a coloring process
    9.
    发明授权
    Process for protection of the surface of a fixed contact for a semiconductor color image sensor cell during a coloring process 有权
    用于在着色过程中保护用于半导体彩色图像传感器单元的固定触点的表面的工艺

    公开(公告)号：US06951772B2

    公开(公告)日：2005-10-04

    申请号：US10739871

    申请日：2003-12-18

    申请人： Baudoin Lecohier ,  Brendan Dunne

    发明人： Baudoin Lecohier ,  Brendan Dunne

    IPC分类号： H01L27/146 ,  H01L31/0216 ,  H01L31/0232 ,  H01L31/18 ,  H01L21/00

    CPC分类号： H01L27/146 ,  H01L31/02162 ,  H01L31/02327 ,  H01L31/18

    摘要： The invention relates to a process for making a semiconductor color image sensor cell comprising a metal layer in which a fixed contact is defined, an anti-reflecting layer covering the metal layer and a passivation layer covering the assembly. The method includes etching the passivation layer and stopping on the anti-reflecting layer so as to form a hole for the opening of the fixed contact; forming at least one colored filter element on a region of the passivation layer, the anti-reflecting layer then acting as a protection layer for the surface of the fixed contact; depositing a planarizing resin layer so as to cover the colored filter elements; forming micro-lenses on the planarizing resin layer above the colored filter elements; and etching the anti-reflecting layer to open the fixed contact.

    摘要翻译： 本发明涉及一种制造半导体彩色图像传感器单元的方法，该单元包括其中限定有固定触点的金属层，覆盖金属层的抗反射层和覆盖该组件的钝化层。 该方法包括蚀刻钝化层并停止在抗反射层上，以便形成用于打开固定触点的孔; 在钝化层的区域上形成至少一个有色过滤元件，然后防反射层充当固定触点表面的保护层; 沉积平坦化树脂层以覆盖着色滤色器元件; 在着色过滤元件上方的平坦化树脂层上形成微透镜; 并且蚀刻抗反射层以打开固定触点。