CMOS IMAGING DEVICE COMPRISING A MICROLENS ARRAY EXHIBITING A HIGH FILLING RATE
    1.
    发明申请
    CMOS IMAGING DEVICE COMPRISING A MICROLENS ARRAY EXHIBITING A HIGH FILLING RATE 有权
    包含微阵列的CMOS成像装置展现高填充率

    公开(公告)号:US20080290383A1

    公开(公告)日:2008-11-27

    申请号:US12129096

    申请日:2008-05-29

    IPC分类号: H01L31/00 H01L21/00

    摘要: A CMOS imager includes a photosite array and a microlens array. The microlens array comprises microlenses of a first type and microlenses of a second type, the microlenses of first type being manufactured according to a first circular template having a first radius, the microlenses of second type being manufactured according to a second circular template having a second radius inferior to the first radius, and the first and second templates having overlap areas. One advantage is that the CMOS imager has a high fill rate.

    摘要翻译: CMOS成像器包括光子阵列和微透镜阵列。 微透镜阵列包括第一类型的微透镜和第二类型的微透镜,第一类型的微透镜根据具有第一半径的第一圆形模板制造,第二类型的微透镜根据具有第二类型的第二圆形模板制造, 半径低于第一半径,第一和第二模板具有重叠区域。 一个优点是CMOS成像器具有高填充率。

    CMOS imaging device comprising a microlens array exhibiting a high filling rate
    2.
    发明授权
    CMOS imaging device comprising a microlens array exhibiting a high filling rate 有权
    CMOS成像装置包括显示高填充率的微透镜阵列

    公开(公告)号:US07842909B2

    公开(公告)日:2010-11-30

    申请号:US12129096

    申请日:2008-05-29

    IPC分类号: H01L31/00 H01L21/00

    摘要: A CMOS imager includes a photosite array and a microlens array. The microlens array comprises microlenses of a first type and microlenses of a second type, the microlenses of first type being manufactured according to a first circular template having a first radius, the microlenses of second type being manufactured according to a second circular template having a second radius inferior to the first radius, and the first and second templates having overlap areas. One advantage is that the CMOS imager has a high fill rate.

    摘要翻译: CMOS成像器包括光子阵列和微透镜阵列。 微透镜阵列包括第一类型的微透镜和第二类型的微透镜,第一类型的微透镜根据具有第一半径的第一圆形模板制造,第二类型的微透镜根据具有第二类型的第二圆形模板制造, 半径低于第一半径,第一和第二模板具有重叠区域。 一个优点是CMOS成像器具有高填充率。

    Device for protecting an integrated circuit chip against attacks
    5.
    发明授权
    Device for protecting an integrated circuit chip against attacks 有权
    用于保护集成电路芯片免受攻击的装置

    公开(公告)号:US08796765B2

    公开(公告)日:2014-08-05

    申请号:US13495945

    申请日:2012-06-13

    IPC分类号: H01L29/66

    摘要: An integrated circuit chip includes: a plurality of parallel wells of alternated conductivity types formed in the upper portion of a semiconductor substrate of a first conductivity type; in each well of the first type, a plurality of MOS transistors having a channel of the second conductivity type, and in each well of the second type, a plurality of MOS transistors having a channel of the first type, transistors of neighboring wells being inverted-connected; and a device of protection against attacks, including: a layer of the second type extending under said plurality of wells, from the lower surface of said wells; and regions of lateral insulation between the wells, said regions extending from the upper surface of the wells to said layer.

    摘要翻译: 集成电路芯片包括:形成在第一导电类型的半导体衬底的上部的多个交替导电类型的平行阱; 在第一类型的每个阱中,具有第二导电类型的沟道的多个MOS晶体管,并且在第二类型的每个阱中,具有第一类型的沟道的多个MOS晶体管,相邻阱的晶体管被​​反相 -连接的; 以及防止攻击的装置,包括:从所述井的下表面在所述多个井下延伸的第二类型的层; 以及井之间的侧向绝缘区域,所述区域从孔的上表面延伸到所述层。

    DEVICE FOR PROTECTING AN INTEGRATED CIRCUIT CHIP AGAINST ATTACKS
    6.
    发明申请
    DEVICE FOR PROTECTING AN INTEGRATED CIRCUIT CHIP AGAINST ATTACKS 有权
    用于保护集成电路芯片的设备,以防止攻击

    公开(公告)号:US20120320480A1

    公开(公告)日:2012-12-20

    申请号:US13495945

    申请日:2012-06-13

    IPC分类号: H02H3/44 H01L21/8238

    摘要: An integrated circuit chip includes: a plurality of parallel wells of alternated conductivity types formed in the upper portion of a semiconductor substrate of a first conductivity type; in each well of the first type, a plurality of MOS transistors having a channel of the second conductivity type, and in each well of the second type, a plurality of MOS transistors having a channel of the first type, transistors of neighboring wells being inverted-connected; and a device of protection against attacks, including: a layer of the second type extending under said plurality of wells, from the lower surface of said wells; and regions of lateral insulation between the wells, said regions extending from the upper surface of the wells to said layer.

    摘要翻译: 集成电路芯片包括:形成在第一导电类型的半导体衬底的上部的多个交替导电类型的平行阱; 在第一类型的每个阱中,具有第二导电类型的沟道的多个MOS晶体管,并且在第二类型的每个阱中,具有第一类型的沟道的多个MOS晶体管,相邻阱的晶体管被​​反相 -连接的; 以及防止攻击的装置,包括:从所述井的下表面在所述多个井下延伸的第二类型的层; 以及井之间的侧向绝缘区域,所述区域从孔的上表面延伸到所述层。