- 专利标题： Memory cell comprising first and second transistors and methods of operating
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申请号： US17016540申请日： 2020-09-10
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公开(公告)号： US11348922B2公开(公告)日： 2022-05-31
- 发明人: Yuniarto Widjaja , Jin-Woo Han , Benjamin S. Louie
- 申请人： Zeno Semiconductor, Inc.
- 申请人地址： US CA Sunnyvale
- 专利权人： Zeno Semiconductor, Inc.
- 当前专利权人： Zeno Semiconductor, Inc.
- 当前专利权人地址： US CA Sunnyvale
- 代理机构： Law Office of Alan W. Cannon
- 主分类号： H01L27/108
- IPC分类号： H01L27/108 ; H01L29/78 ; H01L27/11524 ; H01L29/08 ; H01L29/10 ; H01L29/36 ; H01L29/732 ; H01L29/70 ; G11C11/404 ; H01L29/73 ; G11C16/04 ; G11C16/10 ; H01L27/102 ; G11C16/26 ; G11C16/34
摘要：
Semiconductor memory cells, array and methods of operating are disclosed. In one instance, a memory cell includes a bi-stable floating body transistor and an access device; wherein the bi-stable floating body transistor and the access device are electrically connected in series.
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