CURRENT DAMPING FOR DC-DC CONVERTER
    2.
    发明公开

    公开(公告)号:US20240364209A1

    公开(公告)日:2024-10-31

    申请号:US18308180

    申请日:2023-04-27

    IPC分类号: H02M1/15 H02M1/08 H02M3/158

    CPC分类号: H02M1/15 H02M1/08 H02M3/158

    摘要: A device may drive, during a first portion of a switching period, a first switching element to electrically connect a switching node to a first node of a supply. The switching node is configured to couple to a first node of an inductive element. The device may drive, during a second portion of the switching period, a second switching element to electrically connect the switching node to a second node of the supply of the controller circuitry. The device may drive, during a third portion of the switching period, the first switching element to refrain from connecting the switching node to the first node of the supply of the controller circuitry, the second switching element to refrain from connecting the switching node to the second node of the supply, and a third switching element to electrically connect the switching node to a second node of the inductive element.

    DROOP COMPENSATION FOR CURRENT MODE VOLTAGE CONVERTER

    公开(公告)号:US20240364204A1

    公开(公告)日:2024-10-31

    申请号:US18308042

    申请日:2023-04-27

    IPC分类号: H02M1/00 H02M3/158

    摘要: A voltage regulator includes a transconductance amplifier having an input and an output. The input is coupled to a voltage regulator output. A droop compensation circuit is coupled to the output of the transconductance amplifier. The droop compensation circuit includes a voltage source circuit configured to cause a voltage at an output of the voltage regulator to change from a first voltage level to a second voltage level in response to a first change in a load condition and remain at the second voltage level until a second change in the load condition. The droop compensation circuit also is configured to cause the voltage at the output of the voltage regulator to change from the second voltage level back to the first voltage level in response to the second change in the load condition.

    Three-phase AC to DC isolated power conversion with power factor correction

    公开(公告)号:US12132403B1

    公开(公告)日:2024-10-29

    申请号:US17939820

    申请日:2022-09-07

    申请人: Vicor Corporation

    摘要: An isolated, power factor corrected, converter, for operation from a three-phase AC source, comprises three power processors, each power processor connected to one of the three phases. Each power processor comprises a cascade of a first and a second power conversion stage. At least one of the first and second power converters in each power processor is configured to provide galvanic isolation through a DC Transformer between the power processor input and output. At least one of the first and second power converters in each power processor is configured to provide power factor correction at the AC source. Substantially all of the bulk energy storage and low frequency filtering is provided by storage elements at the output of the power system. Low voltage semiconductor devices may be cascaded to implement low output capacitance high voltage switches in a multi-cell resonant converter for high voltage applications.

    Buck converter and control method

    公开(公告)号:US12132401B2

    公开(公告)日:2024-10-29

    申请号:US18056758

    申请日:2022-11-18

    摘要: An apparatus includes a PWM ramp generator coupled between a switching node of a power converter and a first input of a comparator, the PWM ramp generator including a first resistor and a first capacitor connected in series between the switching node and the first input of the comparator, and a second resistor and a second capacitor connected in parallel between the first input of the comparator and a feedback node, and a PFM control circuit including an error amplifier and a current zero crossing detection comparator, wherein the error amplifier is coupled between a second input of the comparator and a reference node, and the PFM control circuit is configured to generate gate drive signal for the power converter when the power converter is configured to operate in a PFM mode.

    Method for paralleling of interleaved power converters

    公开(公告)号:US12126261B2

    公开(公告)日:2024-10-22

    申请号:US18210804

    申请日:2023-06-16

    摘要: Examples of the disclosure include a UPS comprising an output to be coupled to a load, a first converter leg to provide a first voltage to the output and including at least one of a first relay or fuse, a second converter leg in parallel with the first converter leg including at least one of a second relay or fuse and configured to provide a second voltage to the output out of phase with the first converter leg providing the first voltage signal, current sensors coupled to the first and second converter legs, respectively, and configured to provide a first signal indicative of a current in the first converter leg and a second signal indicative of a current in the second converter leg, respectively, and at least one controller to receive the signals, determine a current difference between the converter legs based on the signals, and decrease the current difference.

    POWER SUPPLY CIRCUIT AND DEVICE
    8.
    发明公开

    公开(公告)号:US20240348158A1

    公开(公告)日:2024-10-17

    申请号:US18751670

    申请日:2024-06-24

    发明人: Masami KISHIRO

    IPC分类号: H02M1/44 H02M3/158

    CPC分类号: H02M1/44 H02M3/158

    摘要: A power supply circuit includes: an input terminal that receives an input voltage; an inductor; a switching circuit electrically connected to the inductor and configured to switch between a storing period for storing energy in the inductor and a discharge period for discharging the energy stored in the inductor; an output terminal that receives a current from the inductor in the storing and discharging periods; a transistor electrically connected to the inductor and serving as a portion of a path of a current flowing to the inductor in the storing and discharging periods. The output terminal outputs a voltage based on the storing period, the discharging period, and the input voltage. The transistor stops a switching operation that is used to switch between the storing and discharging periods, by preventing the current flowing to the inductor, in a signal processing period in which a signal processing circuit is processing a signal.

    Driver circuit and imaging device
    10.
    发明授权

    公开(公告)号:US12120442B2

    公开(公告)日:2024-10-15

    申请号:US17760170

    申请日:2020-12-28

    IPC分类号: H04N25/709 H02M3/158

    CPC分类号: H04N25/709 H02M3/1582

    摘要: To reduce power consumption of a driver circuit used in a vertical drive circuit of an image processing device.
    In the driver circuit, a drive signal output circuit outputs a drive signal in accordance with a predetermined trigger signal. Furthermore, at a time of rising of the drive signal, a step-up switch sequentially selects a plurality of voltages in ascending order, and supplies the selected voltage to the drive signal output circuit. Moreover, at a time of falling of the drive signal, a step-down switch sequentially selects a plurality of voltages in descending order, and supplies the selected voltage to the drive signal output circuit.