公开(公告)号：US20250079969A1

公开(公告)日：2025-03-06

申请号：US18241363

申请日：2023-09-01

Applicant: Halo Microelectronics International

Inventor： Rui Liu ,  Sofjan Goenawan

IPC: H02M1/00 ,  H02M1/36 ,  H02M3/07

Abstract: An apparatus includes a first switch connected between an input voltage bus of a hybrid switched capacitor converter and an input of a bias power regulator, a second switch connected between a first switching node of the hybrid switched capacitor converter and the input of the bias power regulator, wherein the second switch is configured such that when the second switch is turned on, a voltage on the first switching node is equal to (N/M) of a voltage on the input voltage bus, a third switch connected between a second switching node of the hybrid switched capacitor converter and the input of the bias power regulator, wherein the third switch is configured such that when the third switch is turned on, a voltage on the second switching node is equal to (L/M) of the voltage on the input voltage bus.

公开(公告)号：US12132401B2

公开(公告)日：2024-10-29

申请号：US18056758

申请日：2022-11-18

Applicant: Halo Microelectronics International

Inventor： Rui Liu ,  Sofjan Goenawan

IPC: H02M3/158 ,  H02M1/08 ,  H02M3/06 ,  H02M3/156 ,  H02M3/157

CPC classification number: H02M3/158 ,  H02M1/083 ,  H02M3/06 ,  H02M3/156 ,  H02M3/157

Abstract: An apparatus includes a PWM ramp generator coupled between a switching node of a power converter and a first input of a comparator, the PWM ramp generator including a first resistor and a first capacitor connected in series between the switching node and the first input of the comparator, and a second resistor and a second capacitor connected in parallel between the first input of the comparator and a feedback node, and a PFM control circuit including an error amplifier and a current zero crossing detection comparator, wherein the error amplifier is coupled between a second input of the comparator and a reference node, and the PFM control circuit is configured to generate gate drive signal for the power converter when the power converter is configured to operate in a PFM mode.

公开(公告)号：US20230299674A1

公开(公告)日：2023-09-21

申请号：US18056758

申请日：2022-11-18

Applicant: Halo Microelectronics International

Inventor： Rui Liu ,  Sofjan Goenawan

IPC: H02M3/158 ,  H02M3/06 ,  H02M1/08 ,  H02M3/157

CPC classification number: H02M3/158 ,  H02M1/083 ,  H02M3/06 ,  H02M3/157

Abstract: An apparatus includes a PWM ramp generator coupled between a switching node of a power converter and a first input of a comparator, the PWM ramp generator comprising a first resistor and a first capacitor connected in series between the switching node and the first input of the comparator, and a second resistor and a second capacitor connected in parallel between the first input of the comparator and a feedback node, and a PFM control circuit comprising an error amplifier and a current zero crossing detection comparator, wherein the error amplifier is coupled between a second input of the comparator and a reference node, and the PFM control circuit is configured to generate gate drive signal for the power converter when the power converter is configured to operate in a PFM mode.